arm64: dts: qcom: use sm8250 gpucc dt-bindings

Constants were used to allow merging separately from the dt-bindings,
switch to symbolic names now that dt-bindings have landed.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200818160445.14008-3-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 377172e8967b7e949f7b0977b31596fa7724b6c2..b82d8f40fa425f1321b05c6beb8c5f32f49451ca 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -5,6 +5,7 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
+#include <dt-bindings/clock/qcom,gpucc-sm8250.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
 #include <dt-bindings/power/qcom-aoss-qmp.h>
@@ -1127,15 +1128,15 @@
                                     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hfi", "gmu";
 
-                       clocks = <&gpucc 0>,
-                                <&gpucc 3>,
-                                <&gpucc 6>,
+                       clocks = <&gpucc GPU_CC_AHB_CLK>,
+                                <&gpucc GPU_CC_CX_GMU_CLK>,
+                                <&gpucc GPU_CC_CXO_CLK>,
                                 <&gcc GCC_DDRSS_GPU_AXI_CLK>,
                                 <&gcc GCC_GPU_MEMNOC_GFX_CLK>;
                        clock-names = "ahb", "gmu", "cxo", "axi", "memnoc";
 
-                       power-domains = <&gpucc 0>,
-                                       <&gpucc 1>;
+                       power-domains = <&gpucc GPU_CX_GDSC>,
+                                       <&gpucc GPU_GX_GDSC>;
                        power-domain-names = "cx", "gx";
 
                        iommus = <&adreno_smmu 5 0x400>;
@@ -1181,12 +1182,12 @@
                                     <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&gpucc 0>,
+                       clocks = <&gpucc GPU_CC_AHB_CLK>,
                                 <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
                                 <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>;
                        clock-names = "ahb", "bus", "iface";
 
-                       power-domains = <&gpucc 0>;
+                       power-domains = <&gpucc GPU_CX_GDSC>;
                };
 
                slpi: remoteproc@5c00000 {