drm/amdgpu/soc15: add Arcturus common ip blocks

Add common IP blocks for Arcturus.

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index fbc067786b2a0d6c21135b17f190ce0a326d1abf..54d407f0d04f720e3d1e19752058137d0774da03 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -598,12 +598,13 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
 
        if (adev->flags & AMD_IS_APU)
                adev->nbio_funcs = &nbio_v7_0_funcs;
-       else if (adev->asic_type == CHIP_VEGA20)
+       else if (adev->asic_type == CHIP_VEGA20 ||
+               adev->asic_type == CHIP_ARCTURUS)
                adev->nbio_funcs = &nbio_v7_4_funcs;
        else
                adev->nbio_funcs = &nbio_v6_1_funcs;
 
-       if (adev->asic_type == CHIP_VEGA20)
+       if (adev->asic_type == CHIP_VEGA20 || adev->asic_type == CHIP_ARCTURUS)
                adev->df_funcs = &df_v3_6_funcs;
        else
                adev->df_funcs = &df_v1_7_funcs;
@@ -675,6 +676,15 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
 #endif
                amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block);
                break;
+       case CHIP_ARCTURUS:
+               amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);
+               amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block);
+               amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);
+               if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
+                       amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
+               amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
+               amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
+               break;
        default:
                return -EINVAL;
        }
@@ -1001,6 +1011,10 @@ static int soc15_common_early_init(void *handle)
                                AMD_PG_SUPPORT_CP |
                                AMD_PG_SUPPORT_RLC_SMU_HS;
                break;
+       case CHIP_ARCTURUS:
+               adev->cg_flags = 0;
+               adev->pg_flags = 0;
+               break;
        default:
                /* FIXME: not supported yet */
                return -EINVAL;