drm/komeda: Clear enable bit in CU_INPUTx_CONTROL

Besides clearing the input ID to zero, D71 compiz also has input
enable bit in CU_INPUTx_CONTROL which need to be cleared.

Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>

diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
index 1f7a5d572b1a729666a5e4631228f5b19992f871..7f4c23abc317269597103c961eff4af7195148de 100644 (file)
--- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
+++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
@@ -430,8 +430,18 @@ static void d71_component_disable(struct komeda_component *c)
 
        malidp_write32(reg, BLK_CONTROL, 0);
 
-       for (i = 0; i < c->max_active_inputs; i++)
+       for (i = 0; i < c->max_active_inputs; i++) {
                malidp_write32(reg, BLK_INPUT_ID0 + (i << 2), 0);
+
+               /* Besides clearing the input ID to zero, D71 compiz also has
+                * input enable bit in CU_INPUTx_CONTROL which need to be
+                * cleared.
+                */
+               if (has_bit(c->id, KOMEDA_PIPELINE_COMPIZS))
+                       malidp_write32(reg, CU_INPUT0_CONTROL +
+                                      i * CU_PER_INPUT_REGS * 4,
+                                      CU_INPUT_CTRL_ALPHA(0xFF));
+       }
 }
 
 static void compiz_enable_input(u32 __iomem *id_reg,