if (pdev->vendor == PCI_VENDOR_ID_AMD
                                && pdev->device == 0x740c) {
                        ohci->flags = OHCI_QUIRK_AMD756;
-                       ohci_info (ohci, "AMD756 erratum 4 workaround\n");
+                       ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
                        // also somewhat erratum 10 (suspend/resume issues)
                }
 
                 */
                else if (pdev->vendor == PCI_VENDOR_ID_OPTI
                                && pdev->device == 0xc861) {
-                       ohci_info (ohci,
+                       ohci_dbg (ohci,
                                "WARNING: OPTi workarounds unavailable\n");
                }
 
                        if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
                                        && b->vendor == PCI_VENDOR_ID_NS) {
                                ohci->flags |= OHCI_QUIRK_SUPERIO;
-                               ohci_info (ohci, "Using NSC SuperIO setup\n");
+                               ohci_dbg (ohci, "Using NSC SuperIO setup\n");
                        }
                }
+
+               /* Check for Compaq's ZFMicro chipset, which needs short 
+                * delays before control or bulk queues get re-activated
+                * in finish_unlinks()
+                */
+               else if (pdev->vendor == PCI_VENDOR_ID_COMPAQ
+                               && pdev->device  == 0xa0f8) {
+                       ohci->flags |= OHCI_QUIRK_ZFMICRO;
+                       ohci_dbg (ohci,
+                               "enabled Compaq ZFMicro chipset quirk\n");
+               }
        }
 
        /* NOTE: there may have already been a first reset, to
 
 
                if (ohci->ed_controltail) {
                        command |= OHCI_CLF;
+                       if (ohci->flags & OHCI_QUIRK_ZFMICRO)
+                               mdelay(1);
                        if (!(ohci->hc_control & OHCI_CTRL_CLE)) {
                                control |= OHCI_CTRL_CLE;
                                ohci_writel (ohci, 0,
                }
                if (ohci->ed_bulktail) {
                        command |= OHCI_BLF;
+                       if (ohci->flags & OHCI_QUIRK_ZFMICRO)
+                               mdelay(1);
                        if (!(ohci->hc_control & OHCI_CTRL_BLE)) {
                                control |= OHCI_CTRL_BLE;
                                ohci_writel (ohci, 0,
                /* CLE/BLE to enable, CLF/BLF to (maybe) kickstart */
                if (control) {
                        ohci->hc_control |= control;
+                       if (ohci->flags & OHCI_QUIRK_ZFMICRO)
+                               mdelay(1);
                        ohci_writel (ohci, ohci->hc_control,
                                        &ohci->regs->control);   
                }
-               if (command)
+               if (command) {
+                       if (ohci->flags & OHCI_QUIRK_ZFMICRO)
+                               mdelay(1);
                        ohci_writel (ohci, command, &ohci->regs->cmdstatus);   
-       }
+               }
+       }
 }
 
 
 
 #define        OHCI_QUIRK_SUPERIO      0x02                    /* natsemi */
 #define        OHCI_QUIRK_INITRESET    0x04                    /* SiS, OPTi, ... */
 #define        OHCI_BIG_ENDIAN         0x08                    /* big endian HC */
+#define        OHCI_QUIRK_ZFMICRO      0x10                    /* Compaq ZFMicro chipset*/
        // there are also chip quirks/bugs in init logic
 
 };