]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
ASoC: fsl_sai: replace regmap_write with regmap_update_bits
authorShengjiu Wang <shengjiu.wang@nxp.com>
Thu, 7 Aug 2025 02:03:18 +0000 (10:03 +0800)
committerMark Brown <broonie@kernel.org>
Sun, 10 Aug 2025 20:06:41 +0000 (21:06 +0100)
Use the regmap_write() for software reset in fsl_sai_config_disable would
cause the FSL_SAI_CSR_BCE bit to be cleared. Refer to
commit 197c53c8ecb34 ("ASoC: fsl_sai: Don't disable bitclock for i.MX8MP")
FSL_SAI_CSR_BCE should not be cleared. So need to use regmap_update_bits()
instead of regmap_write() for these bit operations.

Fixes: dc78f7e59169d ("ASoC: fsl_sai: Force a software reset when starting in consumer mode")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://patch.msgid.link/20250807020318.2143219-1-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/fsl/fsl_sai.c

index c313b654236ce9e96d2165eb03179554dda45b54..d0367b21f77574725fd42c62cabe95bb8effba65 100644 (file)
@@ -809,9 +809,9 @@ static void fsl_sai_config_disable(struct fsl_sai *sai, int dir)
         * are running concurrently.
         */
        /* Software Reset */
-       regmap_write(sai->regmap, FSL_SAI_xCSR(tx, ofs), FSL_SAI_CSR_SR);
+       regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs), FSL_SAI_CSR_SR, FSL_SAI_CSR_SR);
        /* Clear SR bit to finish the reset */
-       regmap_write(sai->regmap, FSL_SAI_xCSR(tx, ofs), 0);
+       regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs), FSL_SAI_CSR_SR, 0);
 }
 
 static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
@@ -930,11 +930,11 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
        unsigned int ofs = sai->soc_data->reg_offset;
 
        /* Software Reset for both Tx and Rx */
-       regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), FSL_SAI_CSR_SR);
-       regmap_write(sai->regmap, FSL_SAI_RCSR(ofs), FSL_SAI_CSR_SR);
+       regmap_update_bits(sai->regmap, FSL_SAI_TCSR(ofs), FSL_SAI_CSR_SR, FSL_SAI_CSR_SR);
+       regmap_update_bits(sai->regmap, FSL_SAI_RCSR(ofs), FSL_SAI_CSR_SR, FSL_SAI_CSR_SR);
        /* Clear SR bit to finish the reset */
-       regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), 0);
-       regmap_write(sai->regmap, FSL_SAI_RCSR(ofs), 0);
+       regmap_update_bits(sai->regmap, FSL_SAI_TCSR(ofs), FSL_SAI_CSR_SR, 0);
+       regmap_update_bits(sai->regmap, FSL_SAI_RCSR(ofs), FSL_SAI_CSR_SR, 0);
 
        regmap_update_bits(sai->regmap, FSL_SAI_TCR1(ofs),
                           FSL_SAI_CR1_RFW_MASK(sai->soc_data->fifo_depth),
@@ -1824,11 +1824,11 @@ static int fsl_sai_runtime_resume(struct device *dev)
 
        regcache_cache_only(sai->regmap, false);
        regcache_mark_dirty(sai->regmap);
-       regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), FSL_SAI_CSR_SR);
-       regmap_write(sai->regmap, FSL_SAI_RCSR(ofs), FSL_SAI_CSR_SR);
+       regmap_update_bits(sai->regmap, FSL_SAI_TCSR(ofs), FSL_SAI_CSR_SR, FSL_SAI_CSR_SR);
+       regmap_update_bits(sai->regmap, FSL_SAI_RCSR(ofs), FSL_SAI_CSR_SR, FSL_SAI_CSR_SR);
        usleep_range(1000, 2000);
-       regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), 0);
-       regmap_write(sai->regmap, FSL_SAI_RCSR(ofs), 0);
+       regmap_update_bits(sai->regmap, FSL_SAI_TCSR(ofs), FSL_SAI_CSR_SR, 0);
+       regmap_update_bits(sai->regmap, FSL_SAI_RCSR(ofs), FSL_SAI_CSR_SR, 0);
 
        ret = regcache_sync(sai->regmap);
        if (ret)