]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
phy: qcom-qmp-combo: generate pipe clock name
authorJohan Hovold <johan+linaro@kernel.org>
Mon, 21 Nov 2022 08:50:48 +0000 (09:50 +0100)
committerVinod Koul <vkoul@kernel.org>
Thu, 24 Nov 2022 17:21:50 +0000 (22:51 +0530)
In preparation for supporting devicetree bindings which do not use child
nodes, generate also the USB3 pipe clock name based on the platform
device name as is done for the DP clocks.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221121085058.31213-6-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-combo.c

index 85def6560e4362567a952caa7b020e67601ee107..7434955c889892a29c8c71dfe0e19a3fca8f5d9a 100644 (file)
@@ -2247,18 +2247,15 @@ static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np)
 {
        struct clk_fixed_rate *fixed;
        struct clk_init_data init = { };
+       char name[64];
        int ret;
 
-       ret = of_property_read_string(np, "clock-output-names", &init.name);
-       if (ret) {
-               dev_err(qmp->dev, "%pOFn: No clock-output-names\n", np);
-               return ret;
-       }
-
        fixed = devm_kzalloc(qmp->dev, sizeof(*fixed), GFP_KERNEL);
        if (!fixed)
                return -ENOMEM;
 
+       snprintf(name, sizeof(name), "%s::pipe_clk", dev_name(qmp->dev));
+       init.name = name;
        init.ops = &clk_fixed_rate_ops;
 
        /* controllers using QMP phys use 125MHz pipe clock interface */