amdgpu_bo_unref(&(bo));
 }
 
+uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd,
+                                     enum kgd_engine_type type)
+{
+       struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
+
+       switch (type) {
+       case KGD_ENGINE_PFP:
+               return adev->gfx.pfp_fw_version;
+
+       case KGD_ENGINE_ME:
+               return adev->gfx.me_fw_version;
+
+       case KGD_ENGINE_CE:
+               return adev->gfx.ce_fw_version;
+
+       case KGD_ENGINE_MEC1:
+               return adev->gfx.mec_fw_version;
+
+       case KGD_ENGINE_MEC2:
+               return adev->gfx.mec2_fw_version;
+
+       case KGD_ENGINE_RLC:
+               return adev->gfx.rlc_fw_version;
+
+       case KGD_ENGINE_SDMA1:
+               return adev->sdma.instance[0].fw_version;
+
+       case KGD_ENGINE_SDMA2:
+               return adev->sdma.instance[1].fw_version;
+
+       default:
+               return 0;
+       }
+
+       return 0;
+}
+
 void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
                                      struct kfd_local_mem_info *mem_info)
 {
 
        uint64_t vram_used;
 };
 
+enum kgd_engine_type {
+       KGD_ENGINE_PFP = 1,
+       KGD_ENGINE_ME,
+       KGD_ENGINE_CE,
+       KGD_ENGINE_MEC1,
+       KGD_ENGINE_MEC2,
+       KGD_ENGINE_RLC,
+       KGD_ENGINE_SDMA1,
+       KGD_ENGINE_SDMA2,
+       KGD_ENGINE_MAX
+};
+
 struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
                                                       struct mm_struct *mm);
 bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm);
                                void **mem_obj, uint64_t *gpu_addr,
                                void **cpu_ptr, bool mqd_gfx9);
 void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
+uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd,
+                                     enum kgd_engine_type type);
 void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
                                      struct kfd_local_mem_info *mem_info);
 uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd);
 
 
 #include <linux/fdtable.h>
 #include <linux/uaccess.h>
-#include <linux/firmware.h>
 #include <linux/mmu_context.h>
 #include <drm/drmP.h>
 #include "amdgpu.h"
 #include "amdgpu_amdkfd.h"
 #include "cikd.h"
 #include "cik_sdma.h"
-#include "amdgpu_ucode.h"
 #include "gfx_v7_0.h"
 #include "gca/gfx_7_2_d.h"
 #include "gca/gfx_7_2_enum.h"
 static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
                                                        uint8_t vmid);
 
-static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
 static void set_scratch_backing_va(struct kgd_dev *kgd,
                                        uint64_t va, uint32_t vmid);
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
        .address_watch_get_offset = kgd_address_watch_get_offset,
        .get_atc_vmid_pasid_mapping_pasid = get_atc_vmid_pasid_mapping_pasid,
        .get_atc_vmid_pasid_mapping_valid = get_atc_vmid_pasid_mapping_valid,
-       .get_fw_version = get_fw_version,
        .set_scratch_backing_va = set_scratch_backing_va,
        .get_tile_config = get_tile_config,
        .set_vm_context_page_table_base = set_vm_context_page_table_base,
        unlock_srbm(kgd);
 }
 
-static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
-{
-       struct amdgpu_device *adev = (struct amdgpu_device *) kgd;
-       const union amdgpu_firmware_header *hdr;
-
-       switch (type) {
-       case KGD_ENGINE_PFP:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.pfp_fw->data;
-               break;
-
-       case KGD_ENGINE_ME:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.me_fw->data;
-               break;
-
-       case KGD_ENGINE_CE:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.ce_fw->data;
-               break;
-
-       case KGD_ENGINE_MEC1:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.mec_fw->data;
-               break;
-
-       case KGD_ENGINE_MEC2:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.mec2_fw->data;
-               break;
-
-       case KGD_ENGINE_RLC:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.rlc_fw->data;
-               break;
-
-       case KGD_ENGINE_SDMA1:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->sdma.instance[0].fw->data;
-               break;
-
-       case KGD_ENGINE_SDMA2:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->sdma.instance[1].fw->data;
-               break;
-
-       default:
-               return 0;
-       }
-
-       if (hdr == NULL)
-               return 0;
-
-       /* Only 12 bit in use*/
-       return hdr->common.ucode_version;
-}
-
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
                        uint64_t page_table_base)
 {
 
 #include <linux/module.h>
 #include <linux/fdtable.h>
 #include <linux/uaccess.h>
-#include <linux/firmware.h>
 #include <linux/mmu_context.h>
 #include <drm/drmP.h>
 #include "amdgpu.h"
 #include "amdgpu_amdkfd.h"
-#include "amdgpu_ucode.h"
 #include "gfx_v8_0.h"
 #include "gca/gfx_8_0_sh_mask.h"
 #include "gca/gfx_8_0_d.h"
                uint8_t vmid);
 static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
                uint8_t vmid);
-static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
 static void set_scratch_backing_va(struct kgd_dev *kgd,
                                        uint64_t va, uint32_t vmid);
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
                        get_atc_vmid_pasid_mapping_pasid,
        .get_atc_vmid_pasid_mapping_valid =
                        get_atc_vmid_pasid_mapping_valid,
-       .get_fw_version = get_fw_version,
        .set_scratch_backing_va = set_scratch_backing_va,
        .get_tile_config = get_tile_config,
        .set_vm_context_page_table_base = set_vm_context_page_table_base,
        unlock_srbm(kgd);
 }
 
-static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
-{
-       struct amdgpu_device *adev = (struct amdgpu_device *) kgd;
-       const union amdgpu_firmware_header *hdr;
-
-       switch (type) {
-       case KGD_ENGINE_PFP:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.pfp_fw->data;
-               break;
-
-       case KGD_ENGINE_ME:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.me_fw->data;
-               break;
-
-       case KGD_ENGINE_CE:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.ce_fw->data;
-               break;
-
-       case KGD_ENGINE_MEC1:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.mec_fw->data;
-               break;
-
-       case KGD_ENGINE_MEC2:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.mec2_fw->data;
-               break;
-
-       case KGD_ENGINE_RLC:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->gfx.rlc_fw->data;
-               break;
-
-       case KGD_ENGINE_SDMA1:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->sdma.instance[0].fw->data;
-               break;
-
-       case KGD_ENGINE_SDMA2:
-               hdr = (const union amdgpu_firmware_header *)
-                                               adev->sdma.instance[1].fw->data;
-               break;
-
-       default:
-               return 0;
-       }
-
-       if (hdr == NULL)
-               return 0;
-
-       /* Only 12 bit in use*/
-       return hdr->common.ucode_version;
-}
-
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
                uint64_t page_table_base)
 {
 
 #include <linux/module.h>
 #include <linux/fdtable.h>
 #include <linux/uaccess.h>
-#include <linux/firmware.h>
 #include <linux/mmu_context.h>
 #include <drm/drmP.h>
 #include "amdgpu.h"
 #include "amdgpu_amdkfd.h"
-#include "amdgpu_ucode.h"
 #include "soc15_hw_ip.h"
 #include "gc/gc_9_0_offset.h"
 #include "gc/gc_9_0_sh_mask.h"
                uint8_t vmid);
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
                uint64_t page_table_base);
-static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
 static void set_scratch_backing_va(struct kgd_dev *kgd,
                                        uint64_t va, uint32_t vmid);
 static int invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid);
                        get_atc_vmid_pasid_mapping_pasid,
        .get_atc_vmid_pasid_mapping_valid =
                        get_atc_vmid_pasid_mapping_valid,
-       .get_fw_version = get_fw_version,
        .set_scratch_backing_va = set_scratch_backing_va,
        .get_tile_config = amdgpu_amdkfd_get_tile_config,
        .set_vm_context_page_table_base = set_vm_context_page_table_base,
         */
 }
 
-/* FIXME: Does this need to be ASIC-specific code? */
-static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
-{
-       struct amdgpu_device *adev = (struct amdgpu_device *) kgd;
-       const union amdgpu_firmware_header *hdr;
-
-       switch (type) {
-       case KGD_ENGINE_PFP:
-               hdr = (const union amdgpu_firmware_header *)adev->gfx.pfp_fw->data;
-               break;
-
-       case KGD_ENGINE_ME:
-               hdr = (const union amdgpu_firmware_header *)adev->gfx.me_fw->data;
-               break;
-
-       case KGD_ENGINE_CE:
-               hdr = (const union amdgpu_firmware_header *)adev->gfx.ce_fw->data;
-               break;
-
-       case KGD_ENGINE_MEC1:
-               hdr = (const union amdgpu_firmware_header *)adev->gfx.mec_fw->data;
-               break;
-
-       case KGD_ENGINE_MEC2:
-               hdr = (const union amdgpu_firmware_header *)adev->gfx.mec2_fw->data;
-               break;
-
-       case KGD_ENGINE_RLC:
-               hdr = (const union amdgpu_firmware_header *)adev->gfx.rlc_fw->data;
-               break;
-
-       case KGD_ENGINE_SDMA1:
-               hdr = (const union amdgpu_firmware_header *)adev->sdma.instance[0].fw->data;
-               break;
-
-       case KGD_ENGINE_SDMA2:
-               hdr = (const union amdgpu_firmware_header *)adev->sdma.instance[1].fw->data;
-               break;
-
-       default:
-               return 0;
-       }
-
-       if (hdr == NULL)
-               return 0;
-
-       /* Only 12 bit in use*/
-       return hdr->common.ucode_version;
-}
-
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
                uint64_t page_table_base)
 {
 
 {
        unsigned int size;
 
-       kfd->mec_fw_version = kfd->kfd2kgd->get_fw_version(kfd->kgd,
+       kfd->mec_fw_version = amdgpu_amdkfd_get_fw_version(kfd->kgd,
                        KGD_ENGINE_MEC1);
-       kfd->sdma_fw_version = kfd->kfd2kgd->get_fw_version(kfd->kgd,
+       kfd->sdma_fw_version = amdgpu_amdkfd_get_fw_version(kfd->kgd,
                        KGD_ENGINE_SDMA1);
        kfd->shared_resources = *gpu_resources;
 
 
        KGD_POOL_FRAMEBUFFER = 3,
 };
 
-enum kgd_engine_type {
-       KGD_ENGINE_PFP = 1,
-       KGD_ENGINE_ME,
-       KGD_ENGINE_CE,
-       KGD_ENGINE_MEC1,
-       KGD_ENGINE_MEC2,
-       KGD_ENGINE_RLC,
-       KGD_ENGINE_SDMA1,
-       KGD_ENGINE_SDMA2,
-       KGD_ENGINE_MAX
-};
-
 /**
  * enum kfd_sched_policy
  *
  * @hqd_sdma_destroy: Destructs and preempts the SDMA queue assigned to that
  * SDMA hqd slot.
  *
- * @get_fw_version: Returns FW versions from the header
- *
  * @set_scratch_backing_va: Sets VA for scratch backing memory of a VMID.
  * Only used for no cp scheduling mode
  *
                                        struct kgd_dev *kgd,
                                        uint8_t vmid);
 
-       uint16_t (*get_fw_version)(struct kgd_dev *kgd,
-                               enum kgd_engine_type type);
        void (*set_scratch_backing_va)(struct kgd_dev *kgd,
                                uint64_t va, uint32_t vmid);
        int (*get_tile_config)(struct kgd_dev *kgd, struct tile_config *config);