}
 
        for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {
-               mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev,
-                                     mtk_crtc->ddp_comp[i]->id,
-                                     mtk_crtc->ddp_comp[i + 1]->id);
-               mtk_mutex_add_comp(mtk_crtc->mutex,
-                                       mtk_crtc->ddp_comp[i]->id);
+               if (!mtk_ddp_comp_connect(mtk_crtc->ddp_comp[i], mtk_crtc->mmsys_dev,
+                                         mtk_crtc->ddp_comp[i + 1]->id))
+                       mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev,
+                                             mtk_crtc->ddp_comp[i]->id,
+                                             mtk_crtc->ddp_comp[i + 1]->id);
+               if (!mtk_ddp_comp_add(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))
+                       mtk_mutex_add_comp(mtk_crtc->mutex,
+                                          mtk_crtc->ddp_comp[i]->id);
        }
-       mtk_mutex_add_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);
+       if (!mtk_ddp_comp_add(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))
+               mtk_mutex_add_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);
        mtk_mutex_enable(mtk_crtc->mutex);
 
        for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
        }
 
        for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)
-               mtk_mutex_remove_comp(mtk_crtc->mutex,
-                                          mtk_crtc->ddp_comp[i]->id);
+               if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))
+                       mtk_mutex_remove_comp(mtk_crtc->mutex,
+                                             mtk_crtc->ddp_comp[i]->id);
        mtk_mutex_disable(mtk_crtc->mutex);
        for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {
-               mtk_mmsys_ddp_disconnect(mtk_crtc->mmsys_dev,
-                                        mtk_crtc->ddp_comp[i]->id,
-                                        mtk_crtc->ddp_comp[i + 1]->id);
-               mtk_mutex_remove_comp(mtk_crtc->mutex,
-                                          mtk_crtc->ddp_comp[i]->id);
+               if (!mtk_ddp_comp_disconnect(mtk_crtc->ddp_comp[i], mtk_crtc->mmsys_dev,
+                                            mtk_crtc->ddp_comp[i + 1]->id))
+                       mtk_mmsys_ddp_disconnect(mtk_crtc->mmsys_dev,
+                                                mtk_crtc->ddp_comp[i]->id,
+                                                mtk_crtc->ddp_comp[i + 1]->id);
+               if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))
+                       mtk_mutex_remove_comp(mtk_crtc->mutex,
+                                             mtk_crtc->ddp_comp[i]->id);
        }
-       mtk_mutex_remove_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);
+       if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))
+               mtk_mutex_remove_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);
        mtk_crtc_ddp_clk_disable(mtk_crtc);
        mtk_mutex_unprepare(mtk_crtc->mutex);
 
 }
 
 int mtk_drm_crtc_create(struct drm_device *drm_dev,
-                       const enum mtk_ddp_comp_id *path, unsigned int path_len,
+                       const unsigned int *path, unsigned int path_len,
                        int priv_data_index)
 {
        struct mtk_drm_private *priv = drm_dev->dev_private;
                node = priv->comp_node[comp_id];
                comp = &priv->ddp_comp[comp_id];
 
-               if (!node) {
+               /* Not all drm components have a DTS device node, such as ovl_adaptor,
+                * which is the drm bring up sub driver
+                */
+               if (!node && comp_id != DDP_COMPONENT_DRM_OVL_ADAPTOR) {
                        dev_info(dev,
-                                "Not creating crtc %d because component %d is disabled or missing\n",
-                                crtc_i, comp_id);
+                               "Not creating crtc %d because component %d is disabled or missing\n",
+                               crtc_i, comp_id);
                        return 0;
                }
 
        }
 
        for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
-               enum mtk_ddp_comp_id comp_id = path[i];
+               unsigned int comp_id = path[i];
                struct mtk_ddp_comp *comp;
 
                comp = &priv->ddp_comp[comp_id];
 
        .start = mtk_ufoe_start,
 };
 
+static const struct mtk_ddp_comp_funcs ddp_ovl_adaptor = {
+       .clk_enable = mtk_ovl_adaptor_clk_enable,
+       .clk_disable = mtk_ovl_adaptor_clk_disable,
+       .config = mtk_ovl_adaptor_config,
+       .start = mtk_ovl_adaptor_start,
+       .stop = mtk_ovl_adaptor_stop,
+       .layer_nr = mtk_ovl_adaptor_layer_nr,
+       .layer_config = mtk_ovl_adaptor_layer_config,
+       .register_vblank_cb = mtk_ovl_adaptor_register_vblank_cb,
+       .unregister_vblank_cb = mtk_ovl_adaptor_unregister_vblank_cb,
+       .enable_vblank = mtk_ovl_adaptor_enable_vblank,
+       .disable_vblank = mtk_ovl_adaptor_disable_vblank,
+       .dma_dev_get = mtk_ovl_adaptor_dma_dev_get,
+       .connect = mtk_ovl_adaptor_connect,
+       .disconnect = mtk_ovl_adaptor_disconnect,
+       .add = mtk_ovl_adaptor_add_comp,
+       .remove = mtk_ovl_adaptor_remove_comp,
+};
+
 static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {
        [MTK_DISP_AAL] = "aal",
        [MTK_DISP_BLS] = "bls",
        [MTK_DISP_OD] = "od",
        [MTK_DISP_OVL] = "ovl",
        [MTK_DISP_OVL_2L] = "ovl-2l",
+       [MTK_DISP_OVL_ADAPTOR] = "ovl_adaptor",
        [MTK_DISP_POSTMASK] = "postmask",
        [MTK_DISP_PWM] = "pwm",
        [MTK_DISP_RDMA] = "rdma",
        const struct mtk_ddp_comp_funcs *funcs;
 };
 
-static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
-       [DDP_COMPONENT_AAL0]            = { MTK_DISP_AAL,       0, &ddp_aal },
-       [DDP_COMPONENT_AAL1]            = { MTK_DISP_AAL,       1, &ddp_aal },
-       [DDP_COMPONENT_BLS]             = { MTK_DISP_BLS,       0, NULL },
-       [DDP_COMPONENT_CCORR]           = { MTK_DISP_CCORR,     0, &ddp_ccorr },
-       [DDP_COMPONENT_COLOR0]          = { MTK_DISP_COLOR,     0, &ddp_color },
-       [DDP_COMPONENT_COLOR1]          = { MTK_DISP_COLOR,     1, &ddp_color },
-       [DDP_COMPONENT_DITHER0]         = { MTK_DISP_DITHER,    0, &ddp_dither },
-       [DDP_COMPONENT_DP_INTF0]        = { MTK_DP_INTF,        0, &ddp_dpi },
-       [DDP_COMPONENT_DP_INTF1]        = { MTK_DP_INTF,        1, &ddp_dpi },
-       [DDP_COMPONENT_DPI0]            = { MTK_DPI,            0, &ddp_dpi },
-       [DDP_COMPONENT_DPI1]            = { MTK_DPI,            1, &ddp_dpi },
-       [DDP_COMPONENT_DSC0]            = { MTK_DISP_DSC,       0, &ddp_dsc },
-       [DDP_COMPONENT_DSC1]            = { MTK_DISP_DSC,       1, &ddp_dsc },
-       [DDP_COMPONENT_DSI0]            = { MTK_DSI,            0, &ddp_dsi },
-       [DDP_COMPONENT_DSI1]            = { MTK_DSI,            1, &ddp_dsi },
-       [DDP_COMPONENT_DSI2]            = { MTK_DSI,            2, &ddp_dsi },
-       [DDP_COMPONENT_DSI3]            = { MTK_DSI,            3, &ddp_dsi },
-       [DDP_COMPONENT_GAMMA]           = { MTK_DISP_GAMMA,     0, &ddp_gamma },
-       [DDP_COMPONENT_MERGE0]          = { MTK_DISP_MERGE,     0, &ddp_merge },
-       [DDP_COMPONENT_MERGE1]          = { MTK_DISP_MERGE,     1, &ddp_merge },
-       [DDP_COMPONENT_MERGE2]          = { MTK_DISP_MERGE,     2, &ddp_merge },
-       [DDP_COMPONENT_MERGE3]          = { MTK_DISP_MERGE,     3, &ddp_merge },
-       [DDP_COMPONENT_MERGE4]          = { MTK_DISP_MERGE,     4, &ddp_merge },
-       [DDP_COMPONENT_MERGE5]          = { MTK_DISP_MERGE,     5, &ddp_merge },
-       [DDP_COMPONENT_OD0]             = { MTK_DISP_OD,        0, &ddp_od },
-       [DDP_COMPONENT_OD1]             = { MTK_DISP_OD,        1, &ddp_od },
-       [DDP_COMPONENT_OVL0]            = { MTK_DISP_OVL,       0, &ddp_ovl },
-       [DDP_COMPONENT_OVL1]            = { MTK_DISP_OVL,       1, &ddp_ovl },
-       [DDP_COMPONENT_OVL_2L0]         = { MTK_DISP_OVL_2L,    0, &ddp_ovl },
-       [DDP_COMPONENT_OVL_2L1]         = { MTK_DISP_OVL_2L,    1, &ddp_ovl },
-       [DDP_COMPONENT_OVL_2L2]         = { MTK_DISP_OVL_2L,    2, &ddp_ovl },
-       [DDP_COMPONENT_POSTMASK0]       = { MTK_DISP_POSTMASK,  0, &ddp_postmask },
-       [DDP_COMPONENT_PWM0]            = { MTK_DISP_PWM,       0, NULL },
-       [DDP_COMPONENT_PWM1]            = { MTK_DISP_PWM,       1, NULL },
-       [DDP_COMPONENT_PWM2]            = { MTK_DISP_PWM,       2, NULL },
-       [DDP_COMPONENT_RDMA0]           = { MTK_DISP_RDMA,      0, &ddp_rdma },
-       [DDP_COMPONENT_RDMA1]           = { MTK_DISP_RDMA,      1, &ddp_rdma },
-       [DDP_COMPONENT_RDMA2]           = { MTK_DISP_RDMA,      2, &ddp_rdma },
-       [DDP_COMPONENT_RDMA4]           = { MTK_DISP_RDMA,      4, &ddp_rdma },
-       [DDP_COMPONENT_UFOE]            = { MTK_DISP_UFOE,      0, &ddp_ufoe },
-       [DDP_COMPONENT_WDMA0]           = { MTK_DISP_WDMA,      0, NULL },
-       [DDP_COMPONENT_WDMA1]           = { MTK_DISP_WDMA,      1, NULL },
+static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_DRM_ID_MAX] = {
+       [DDP_COMPONENT_AAL0]            = { MTK_DISP_AAL,               0, &ddp_aal },
+       [DDP_COMPONENT_AAL1]            = { MTK_DISP_AAL,               1, &ddp_aal },
+       [DDP_COMPONENT_BLS]             = { MTK_DISP_BLS,               0, NULL },
+       [DDP_COMPONENT_CCORR]           = { MTK_DISP_CCORR,             0, &ddp_ccorr },
+       [DDP_COMPONENT_COLOR0]          = { MTK_DISP_COLOR,             0, &ddp_color },
+       [DDP_COMPONENT_COLOR1]          = { MTK_DISP_COLOR,             1, &ddp_color },
+       [DDP_COMPONENT_DITHER0]         = { MTK_DISP_DITHER,            0, &ddp_dither },
+       [DDP_COMPONENT_DP_INTF0]        = { MTK_DP_INTF,                0, &ddp_dpi },
+       [DDP_COMPONENT_DP_INTF1]        = { MTK_DP_INTF,                1, &ddp_dpi },
+       [DDP_COMPONENT_DPI0]            = { MTK_DPI,                    0, &ddp_dpi },
+       [DDP_COMPONENT_DPI1]            = { MTK_DPI,                    1, &ddp_dpi },
+       [DDP_COMPONENT_DRM_OVL_ADAPTOR] = { MTK_DISP_OVL_ADAPTOR,       0, &ddp_ovl_adaptor },
+       [DDP_COMPONENT_DSC0]            = { MTK_DISP_DSC,               0, &ddp_dsc },
+       [DDP_COMPONENT_DSC1]            = { MTK_DISP_DSC,               1, &ddp_dsc },
+       [DDP_COMPONENT_DSI0]            = { MTK_DSI,                    0, &ddp_dsi },
+       [DDP_COMPONENT_DSI1]            = { MTK_DSI,                    1, &ddp_dsi },
+       [DDP_COMPONENT_DSI2]            = { MTK_DSI,                    2, &ddp_dsi },
+       [DDP_COMPONENT_DSI3]            = { MTK_DSI,                    3, &ddp_dsi },
+       [DDP_COMPONENT_GAMMA]           = { MTK_DISP_GAMMA,             0, &ddp_gamma },
+       [DDP_COMPONENT_MERGE0]          = { MTK_DISP_MERGE,             0, &ddp_merge },
+       [DDP_COMPONENT_MERGE1]          = { MTK_DISP_MERGE,             1, &ddp_merge },
+       [DDP_COMPONENT_MERGE2]          = { MTK_DISP_MERGE,             2, &ddp_merge },
+       [DDP_COMPONENT_MERGE3]          = { MTK_DISP_MERGE,             3, &ddp_merge },
+       [DDP_COMPONENT_MERGE4]          = { MTK_DISP_MERGE,             4, &ddp_merge },
+       [DDP_COMPONENT_MERGE5]          = { MTK_DISP_MERGE,             5, &ddp_merge },
+       [DDP_COMPONENT_OD0]             = { MTK_DISP_OD,                0, &ddp_od },
+       [DDP_COMPONENT_OD1]             = { MTK_DISP_OD,                1, &ddp_od },
+       [DDP_COMPONENT_OVL0]            = { MTK_DISP_OVL,               0, &ddp_ovl },
+       [DDP_COMPONENT_OVL1]            = { MTK_DISP_OVL,               1, &ddp_ovl },
+       [DDP_COMPONENT_OVL_2L0]         = { MTK_DISP_OVL_2L,            0, &ddp_ovl },
+       [DDP_COMPONENT_OVL_2L1]         = { MTK_DISP_OVL_2L,            1, &ddp_ovl },
+       [DDP_COMPONENT_OVL_2L2]         = { MTK_DISP_OVL_2L,            2, &ddp_ovl },
+       [DDP_COMPONENT_POSTMASK0]       = { MTK_DISP_POSTMASK,          0, &ddp_postmask },
+       [DDP_COMPONENT_PWM0]            = { MTK_DISP_PWM,               0, NULL },
+       [DDP_COMPONENT_PWM1]            = { MTK_DISP_PWM,               1, NULL },
+       [DDP_COMPONENT_PWM2]            = { MTK_DISP_PWM,               2, NULL },
+       [DDP_COMPONENT_RDMA0]           = { MTK_DISP_RDMA,              0, &ddp_rdma },
+       [DDP_COMPONENT_RDMA1]           = { MTK_DISP_RDMA,              1, &ddp_rdma },
+       [DDP_COMPONENT_RDMA2]           = { MTK_DISP_RDMA,              2, &ddp_rdma },
+       [DDP_COMPONENT_RDMA4]           = { MTK_DISP_RDMA,              4, &ddp_rdma },
+       [DDP_COMPONENT_UFOE]            = { MTK_DISP_UFOE,              0, &ddp_ufoe },
+       [DDP_COMPONENT_WDMA0]           = { MTK_DISP_WDMA,              0, NULL },
+       [DDP_COMPONENT_WDMA1]           = { MTK_DISP_WDMA,              1, NULL },
 };
 
 static bool mtk_drm_find_comp_in_ddp(struct device *dev,
-                                    const enum mtk_ddp_comp_id *path,
+                                    const unsigned int *path,
                                     unsigned int path_len,
                                     struct mtk_ddp_comp *ddp_comp)
 {
 }
 
 int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp,
-                     enum mtk_ddp_comp_id comp_id)
+                     unsigned int comp_id)
 {
        struct platform_device *comp_pdev;
        enum mtk_ddp_comp_type type;
        int ret;
 #endif
 
-       if (comp_id < 0 || comp_id >= DDP_COMPONENT_ID_MAX)
+       if (comp_id < 0 || comp_id >= DDP_COMPONENT_DRM_ID_MAX)
                return -EINVAL;
 
        type = mtk_ddp_matches[comp_id].type;
 
        comp->id = comp_id;
        comp->funcs = mtk_ddp_matches[comp_id].funcs;
-       comp_pdev = of_find_device_by_node(node);
-       if (!comp_pdev) {
-               DRM_INFO("Waiting for device %s\n", node->full_name);
-               return -EPROBE_DEFER;
+       /* Not all drm components have a DTS device node, such as ovl_adaptor,
+        * which is the drm bring up sub driver
+        */
+       if (node) {
+               comp_pdev = of_find_device_by_node(node);
+               if (!comp_pdev) {
+                       DRM_INFO("Waiting for device %s\n", node->full_name);
+                       return -EPROBE_DEFER;
+               }
+               comp->dev = &comp_pdev->dev;
        }
-       comp->dev = &comp_pdev->dev;
 
        if (type == MTK_DISP_AAL ||
            type == MTK_DISP_BLS ||
            type == MTK_DISP_MERGE ||
            type == MTK_DISP_OVL ||
            type == MTK_DISP_OVL_2L ||
+           type == MTK_DISP_OVL_ADAPTOR ||
            type == MTK_DISP_PWM ||
            type == MTK_DISP_RDMA ||
            type == MTK_DPI ||
 
        .atomic_commit = drm_atomic_helper_commit,
 };
 
-static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
+static const unsigned int mt2701_mtk_ddp_main[] = {
        DDP_COMPONENT_OVL0,
        DDP_COMPONENT_RDMA0,
        DDP_COMPONENT_COLOR0,
        DDP_COMPONENT_DSI0,
 };
 
-static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
+static const unsigned int mt2701_mtk_ddp_ext[] = {
        DDP_COMPONENT_RDMA1,
        DDP_COMPONENT_DPI0,
 };
 
-static const enum mtk_ddp_comp_id mt7623_mtk_ddp_main[] = {
+static const unsigned int mt7623_mtk_ddp_main[] = {
        DDP_COMPONENT_OVL0,
        DDP_COMPONENT_RDMA0,
        DDP_COMPONENT_COLOR0,
        DDP_COMPONENT_DPI0,
 };
 
-static const enum mtk_ddp_comp_id mt7623_mtk_ddp_ext[] = {
+static const unsigned int mt7623_mtk_ddp_ext[] = {
        DDP_COMPONENT_RDMA1,
        DDP_COMPONENT_DSI0,
 };
 
-static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
+static const unsigned int mt2712_mtk_ddp_main[] = {
        DDP_COMPONENT_OVL0,
        DDP_COMPONENT_COLOR0,
        DDP_COMPONENT_AAL0,
        DDP_COMPONENT_PWM0,
 };
 
-static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
+static const unsigned int mt2712_mtk_ddp_ext[] = {
        DDP_COMPONENT_OVL1,
        DDP_COMPONENT_COLOR1,
        DDP_COMPONENT_AAL1,
        DDP_COMPONENT_PWM1,
 };
 
-static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
+static const unsigned int mt2712_mtk_ddp_third[] = {
        DDP_COMPONENT_RDMA2,
        DDP_COMPONENT_DSI3,
        DDP_COMPONENT_PWM2,
 };
 
-static enum mtk_ddp_comp_id mt8167_mtk_ddp_main[] = {
+static unsigned int mt8167_mtk_ddp_main[] = {
        DDP_COMPONENT_OVL0,
        DDP_COMPONENT_COLOR0,
        DDP_COMPONENT_CCORR,
        DDP_COMPONENT_DSI0,
 };
 
-static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
+static const unsigned int mt8173_mtk_ddp_main[] = {
        DDP_COMPONENT_OVL0,
        DDP_COMPONENT_COLOR0,
        DDP_COMPONENT_AAL0,
        DDP_COMPONENT_PWM0,
 };
 
-static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
+static const unsigned int mt8173_mtk_ddp_ext[] = {
        DDP_COMPONENT_OVL1,
        DDP_COMPONENT_COLOR1,
        DDP_COMPONENT_GAMMA,
        DDP_COMPONENT_DPI0,
 };
 
-static const enum mtk_ddp_comp_id mt8183_mtk_ddp_main[] = {
+static const unsigned int mt8183_mtk_ddp_main[] = {
        DDP_COMPONENT_OVL0,
        DDP_COMPONENT_OVL_2L0,
        DDP_COMPONENT_RDMA0,
        DDP_COMPONENT_DSI0,
 };
 
-static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = {
+static const unsigned int mt8183_mtk_ddp_ext[] = {
        DDP_COMPONENT_OVL_2L1,
        DDP_COMPONENT_RDMA1,
        DDP_COMPONENT_DPI0,
 };
 
-static const enum mtk_ddp_comp_id mt8186_mtk_ddp_main[] = {
+static const unsigned int mt8186_mtk_ddp_main[] = {
        DDP_COMPONENT_OVL0,
        DDP_COMPONENT_RDMA0,
        DDP_COMPONENT_COLOR0,
        DDP_COMPONENT_DSI0,
 };
 
-static const enum mtk_ddp_comp_id mt8186_mtk_ddp_ext[] = {
+static const unsigned int mt8186_mtk_ddp_ext[] = {
        DDP_COMPONENT_OVL_2L0,
        DDP_COMPONENT_RDMA1,
        DDP_COMPONENT_DPI0,
 };
 
-static const enum mtk_ddp_comp_id mt8192_mtk_ddp_main[] = {
+static const unsigned int mt8192_mtk_ddp_main[] = {
        DDP_COMPONENT_OVL0,
        DDP_COMPONENT_OVL_2L0,
        DDP_COMPONENT_RDMA0,
        DDP_COMPONENT_DSI0,
 };
 
-static const enum mtk_ddp_comp_id mt8192_mtk_ddp_ext[] = {
+static const unsigned int mt8192_mtk_ddp_ext[] = {
        DDP_COMPONENT_OVL_2L2,
        DDP_COMPONENT_RDMA4,
        DDP_COMPONENT_DPI0,
 };
 
-static const enum mtk_ddp_comp_id mt8195_mtk_ddp_main[] = {
+static const unsigned int mt8195_mtk_ddp_main[] = {
        DDP_COMPONENT_OVL0,
        DDP_COMPONENT_RDMA0,
        DDP_COMPONENT_COLOR0,
 {
        struct mtk_drm_private *private = drm->dev_private;
        struct mtk_drm_private *priv_n;
-       struct platform_device *pdev;
-       struct device_node *np = NULL;
-       struct device *dma_dev;
+       struct device *dma_dev = NULL;
        int ret, i, j;
 
        if (drm_firmware_drivers_only())
         *    different drm private data structures. Loop through crtc index to
         *    create crtc from the main path and then ext_path and finally the
         *    third path.
-        * 3. Use OVL device for all DMA memory allocations
         */
        for (i = 0; i < MAX_CRTC; i++) {
                for (j = 0; j < private->data->mmsys_dev_num; j++) {
                                if (ret)
                                        goto err_component_unbind;
 
-                               if (!np)
-                                       np = priv_n->comp_node[priv_n->data->main_path[0]];
-
                                continue;
                        } else if (i == 1 && priv_n->data->ext_len) {
                                ret = mtk_drm_crtc_create(drm, priv_n->data->ext_path,
                                if (ret)
                                        goto err_component_unbind;
 
-                               if (!np)
-                                       np = priv_n->comp_node[priv_n->data->ext_path[0]];
-
                                continue;
                        } else if (i == 2 && priv_n->data->third_len) {
                                ret = mtk_drm_crtc_create(drm, priv_n->data->third_path,
                                if (ret)
                                        goto err_component_unbind;
 
-                               if (!np)
-                                       np = priv_n->comp_node[priv_n->data->third_path[0]];
-
                                continue;
                        }
                }
        }
 
-       pdev = of_find_device_by_node(np);
-       if (!pdev) {
+       /* Use OVL device for all DMA memory allocations */
+       dma_dev = mtk_drm_crtc_dma_dev_get(drm_crtc_from_index(drm, 0));
+       if (!dma_dev) {
                ret = -ENODEV;
                dev_err(drm->dev, "Need at least one OVL device\n");
                goto err_component_unbind;
        }
 
-       dma_dev = &pdev->dev;
        for (i = 0; i < private->data->mmsys_dev_num; i++)
                private->all_drm_private[i]->dma_dev = dma_dev;
 
        .minor = DRIVER_MINOR,
 };
 
+static int compare_dev(struct device *dev, void *data)
+{
+       return dev == (struct device *)data;
+}
+
 static int mtk_drm_bind(struct device *dev)
 {
        struct mtk_drm_private *private = dev_get_drvdata(dev);
        struct mtk_drm_private *private;
        struct device_node *node;
        struct component_match *match = NULL;
+       struct platform_device *ovl_adaptor;
        int ret;
        int i;
 
        if (!private->all_drm_private)
                return -ENOMEM;
 
+       /* Bringup ovl_adaptor */
+       if (mtk_drm_find_mmsys_comp(private, DDP_COMPONENT_DRM_OVL_ADAPTOR)) {
+               ovl_adaptor = platform_device_register_data(dev, "mediatek-disp-ovl-adaptor",
+                                                           PLATFORM_DEVID_AUTO,
+                                                           (void *)private->mmsys_dev,
+                                                           sizeof(*private->mmsys_dev));
+               private->ddp_comp[DDP_COMPONENT_DRM_OVL_ADAPTOR].dev = &ovl_adaptor->dev;
+               mtk_ddp_comp_init(NULL, &private->ddp_comp[DDP_COMPONENT_DRM_OVL_ADAPTOR],
+                                 DDP_COMPONENT_DRM_OVL_ADAPTOR);
+               component_match_add(dev, &match, compare_dev, &ovl_adaptor->dev);
+       }
+
        /* Iterate over sibling DISP function blocks */
        for_each_child_of_node(phandle->parent, node) {
                const struct of_device_id *of_id;
                    comp_type == MTK_DISP_MERGE ||
                    comp_type == MTK_DISP_OVL ||
                    comp_type == MTK_DISP_OVL_2L ||
+                   comp_type == MTK_DISP_OVL_ADAPTOR ||
                    comp_type == MTK_DISP_RDMA ||
                    comp_type == MTK_DP_INTF ||
                    comp_type == MTK_DPI ||
        pm_runtime_disable(dev);
 err_node:
        of_node_put(private->mutex_node);
-       for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
+       for (i = 0; i < DDP_COMPONENT_DRM_ID_MAX; i++)
                of_node_put(private->comp_node[i]);
        return ret;
 }
        component_master_del(&pdev->dev, &mtk_drm_ops);
        pm_runtime_disable(&pdev->dev);
        of_node_put(private->mutex_node);
-       for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
+       for (i = 0; i < DDP_COMPONENT_DRM_ID_MAX; i++)
                of_node_put(private->comp_node[i]);
 
        return 0;
        &mtk_disp_color_driver,
        &mtk_disp_gamma_driver,
        &mtk_disp_merge_driver,
+       &mtk_disp_ovl_adaptor_driver,
        &mtk_disp_ovl_driver,
        &mtk_disp_rdma_driver,
        &mtk_dpi_driver,