#define AER_TLP_HEADER_VALID_FLAG      0x00000001
 #define AER_MULTI_ERROR_VALID_FLAG     0x00000002
 
-#define ERR_CORRECTABLE_ERROR_MASK     0x000031c1
-#define ERR_UNCORRECTABLE_ERROR_MASK   0x001ff010
-
 struct header_log_regs {
        unsigned int dw0;
        unsigned int dw1;
        int severity;                   /* 0:NONFATAL | 1:FATAL | 2:COR */
        int flags;
        unsigned int status;            /* COR/UNCOR Error Status */
+       unsigned int mask;              /* COR/UNCOR Error Mask */
        struct header_log_regs tlp;     /* TLP Header */
 };
 
 
        status = 0;
        mask = 0;
        if (e_info->severity == AER_CORRECTABLE) {
-               pci_read_config_dword(dev,
-                               pos + PCI_ERR_COR_STATUS,
-                               &status);
-               pci_read_config_dword(dev,
-                               pos + PCI_ERR_COR_MASK,
-                               &mask);
-               if (status & ERR_CORRECTABLE_ERROR_MASK & ~mask) {
+               pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status);
+               pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &mask);
+               if (status & ~mask) {
                        add_error_device(e_info, dev);
                        goto added;
                }
        } else {
-               pci_read_config_dword(dev,
-                               pos + PCI_ERR_UNCOR_STATUS,
-                               &status);
-               pci_read_config_dword(dev,
-                               pos + PCI_ERR_UNCOR_MASK,
-                               &mask);
-               if (status & ERR_UNCORRECTABLE_ERROR_MASK & ~mask) {
+               pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
+               pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, &mask);
+               if (status & ~mask) {
                        add_error_device(e_info, dev);
                        goto added;
                }
        if (info->severity == AER_CORRECTABLE) {
                pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS,
                        &info->status);
-               if (!(info->status & ERR_CORRECTABLE_ERROR_MASK))
+               pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK,
+                       &info->mask);
+               if (!(info->status & ~info->mask))
                        return AER_UNSUCCESS;
        } else if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE ||
                info->severity == AER_NONFATAL) {
                /* Link is still healthy for IO reads */
                pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
                        &info->status);
-               if (!(info->status & ERR_UNCORRECTABLE_ERROR_MASK))
+               pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK,
+                       &info->mask);
+               if (!(info->status & ~info->mask))
                        return AER_UNSUCCESS;
 
                if (info->status & AER_LOG_TLP_MASKS) {