dt-bindings: reset: add bindings for A1 SoC audio reset controller

This reset controller is part of audio clock controller and handled by
auxiliary reset driver. Introduced defines supposed to be used together
with upcoming device tree nodes for audio clock controller fo A1 SoC.

Signed-off-by: Jan Dakinevich <jan.dakinevich@salutedevices.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20241112230056.1406222-2-jan.dakinevich@salutedevices.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

diff --git a/include/dt-bindings/reset/amlogic,meson-a1-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-a1-audio-reset.h
new file mode 100644 (file)
index 0000000..7693552
--- /dev/null
+++ b/include/dt-bindings/reset/amlogic,meson-a1-audio-reset.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright (c) 2024, SaluteDevices. All Rights Reserved.
+ *
+ * Author: Jan Dakinevich <jan.dakinevich@salutedevices.com>
+ */
+
+#ifndef _DT_BINDINGS_AMLOGIC_MESON_A1_AUDIO_RESET_H
+#define _DT_BINDINGS_AMLOGIC_MESON_A1_AUDIO_RESET_H
+
+#define AUD_RESET_DDRARB       0
+#define AUD_RESET_TDMIN_A      1
+#define AUD_RESET_TDMIN_B      2
+#define AUD_RESET_TDMIN_LB     3
+#define AUD_RESET_LOOPBACK     4
+#define AUD_RESET_TDMOUT_A     5
+#define AUD_RESET_TDMOUT_B     6
+#define AUD_RESET_FRDDR_A      7
+#define AUD_RESET_FRDDR_B      8
+#define AUD_RESET_TODDR_A      9
+#define AUD_RESET_TODDR_B      10
+#define AUD_RESET_SPDIFIN      11
+#define AUD_RESET_RESAMPLE     12
+#define AUD_RESET_EQDRC                13
+#define AUD_RESET_LOCKER       14
+#define AUD_RESET_TOACODEC     30
+#define AUD_RESET_CLKTREE      31
+
+#define AUD_VAD_RESET_DDRARB   0
+#define AUD_VAD_RESET_PDM      1
+#define AUD_VAD_RESET_TDMIN_VAD        2
+#define AUD_VAD_RESET_TODDR_VAD        3
+#define AUD_VAD_RESET_TOVAD    4
+#define AUD_VAD_RESET_CLKTREE  5
+
+#endif /* _DT_BINDINGS_AMLOGIC_MESON_A1_AUDIO_RESET_H */