return r;
 }
 
+static bool cik_asic_supports_baco(struct amdgpu_device *adev)
+{
+       bool baco_support;
+
+       switch (adev->asic_type) {
+       case CHIP_BONAIRE:
+       case CHIP_HAWAII:
+               smu7_asic_get_baco_capability(adev, &baco_support);
+               break;
+       default:
+               baco_support = false;
+               break;
+       }
+
+       return baco_support;
+}
+
 static enum amd_reset_method
 cik_asic_reset_method(struct amdgpu_device *adev)
 {
        .get_pcie_usage = &cik_get_pcie_usage,
        .need_reset_on_init = &cik_need_reset_on_init,
        .get_pcie_replay_count = &cik_get_pcie_replay_count,
+       .supports_baco = &cik_asic_supports_baco,
 };
 
 static int cik_common_early_init(void *handle)