};
 
 /**
- * struct dpu_hw_sspp_cfg : SSPP configuration
+ * struct dpu_sw_pipe_cfg : software pipe configuration
  * @src_rect:  src ROI, caller takes into account the different operations
  *             such as decimation, flip etc to program this field
  * @dest_rect: destination ROI.
  */
-struct dpu_hw_sspp_cfg {
+struct dpu_sw_pipe_cfg {
        struct drm_rect src_rect;
        struct drm_rect dst_rect;
 };
         * @cfg: Pointer to pipe config structure
         */
        void (*setup_rects)(struct dpu_sw_pipe *pipe,
-                           struct dpu_hw_sspp_cfg *cfg);
+                           struct dpu_sw_pipe_cfg *cfg);
 
        /**
         * setup_pe - setup pipe pixel extension
 
  */
 static void _dpu_plane_calc_bw(struct drm_plane *plane,
        struct drm_framebuffer *fb,
-       struct dpu_hw_sspp_cfg *pipe_cfg)
+       struct dpu_sw_pipe_cfg *pipe_cfg)
 {
        struct dpu_plane_state *pstate;
        struct drm_display_mode *mode;
  * Result: Updates calculated clock in the plane state.
  * Clock equation: dst_w * v_total * fps * (src_h / dst_h)
  */
-static void _dpu_plane_calc_clk(struct drm_plane *plane, struct dpu_hw_sspp_cfg *pipe_cfg)
+static void _dpu_plane_calc_clk(struct drm_plane *plane, struct dpu_sw_pipe_cfg *pipe_cfg)
 {
        struct dpu_plane_state *pstate;
        struct drm_display_mode *mode;
  * @pipe_cfg:          Pointer to pipe configuration
  */
 static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
-               struct drm_framebuffer *fb, struct dpu_hw_sspp_cfg *pipe_cfg)
+               struct drm_framebuffer *fb, struct dpu_sw_pipe_cfg *pipe_cfg)
 {
        struct dpu_plane *pdpu = to_dpu_plane(plane);
        struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
  * @pipe_cfg:          Pointer to pipe configuration
  */
 static void _dpu_plane_set_ot_limit(struct drm_plane *plane,
-               struct drm_crtc *crtc, struct dpu_hw_sspp_cfg *pipe_cfg)
+               struct drm_crtc *crtc, struct dpu_sw_pipe_cfg *pipe_cfg)
 {
        struct dpu_plane *pdpu = to_dpu_plane(plane);
        struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
 
 static void _dpu_plane_setup_scaler(struct dpu_sw_pipe *pipe,
                const struct dpu_format *fmt, bool color_fill,
-               struct dpu_hw_sspp_cfg *pipe_cfg,
+               struct dpu_sw_pipe_cfg *pipe_cfg,
                unsigned int rotation)
 {
        struct dpu_hw_sspp *pipe_hw = pipe->sspp;
        const struct dpu_format *fmt;
        const struct drm_plane *plane = &pdpu->base;
        struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
-       struct dpu_hw_sspp_cfg pipe_cfg;
+       struct dpu_sw_pipe_cfg pipe_cfg;
 
        DPU_DEBUG_PLANE(pdpu, "\n");
 
        bool is_rt_pipe;
        const struct dpu_format *fmt =
                to_dpu_format(msm_framebuffer_format(fb));
-       struct dpu_hw_sspp_cfg pipe_cfg;
+       struct dpu_sw_pipe_cfg pipe_cfg;
 
-       memset(&pipe_cfg, 0, sizeof(struct dpu_hw_sspp_cfg));
+       memset(&pipe_cfg, 0, sizeof(struct dpu_sw_pipe_cfg));
 
        _dpu_plane_set_scanout(plane, pstate, fb);