#define INTEL_FAM6_ATOM_GRACEMONT      0xBE /* Alderlake N */
 
-#define INTEL_FAM6_SIERRAFOREST_X      0xAF
-
-#define INTEL_FAM6_GRANDRIDGE          0xB6
+#define INTEL_FAM6_ATOM_CRESTMONT_X    0xAF /* Sierra Forest */
+#define INTEL_FAM6_ATOM_CRESTMONT      0xB6 /* Grand Ridge */
 
 /* Xeon Phi */
 
 
        X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X,  X86_STEPPINGS(0x0, 0xf), &spr_cfg),
        X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X,   X86_STEPPINGS(0x0, 0xf), &spr_cfg),
        X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(GRANITERAPIDS_X,   X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
-       X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SIERRAFOREST_X,    X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
+       X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT_X,  X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
        {}
 };
 MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);
 
 
 static const struct x86_cpu_id hpm_cpu_ids[] = {
        X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X,     NULL),
-       X86_MATCH_INTEL_FAM6_MODEL(SIERRAFOREST_X,      NULL),
+       X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X,    NULL),
        {}
 };