]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
selftests/powerpc/pmu: Add selftest for reserved bit check for MMCRA thresh_ctl field
authorAthira Rajeev <atrajeev@linux.vnet.ibm.com>
Fri, 10 Jun 2022 13:41:02 +0000 (19:11 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 28 Jun 2022 22:57:44 +0000 (08:57 +1000)
Testcase for reserved bits in Monitor Mode Control Register A (MMCRA)
thresh_ctl bits. For MMCRA[48:51]/[52:55]) Threshold Start/Stop,
0b11110000/0b00001111 is reserved.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220610134113.62991-25-atrajeev@linux.vnet.ibm.com
tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
tools/testing/selftests/powerpc/pmu/event_code_tests/reserved_bits_mmcra_thresh_ctl_test.c [new file with mode: 0644]

index 1ce1ef4586fd5d6ef4b67a17a773ad0999d20885..e505707943376a4a63b9bc05309cef8dac9fa79f 100644 (file)
@@ -3,7 +3,7 @@ CFLAGS += -m64
 
 TEST_GEN_PROGS := group_constraint_pmc56_test group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
        group_constraint_repeat_test group_constraint_radix_scope_qual_test reserved_bits_mmcra_sample_elig_mode_test \
-       group_constraint_mmcra_sample_test invalid_event_code_test
+       group_constraint_mmcra_sample_test invalid_event_code_test reserved_bits_mmcra_thresh_ctl_test
 
 top_srcdir = ../../../../../..
 include ../../../lib.mk
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/reserved_bits_mmcra_thresh_ctl_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/reserved_bits_mmcra_thresh_ctl_test.c
new file mode 100644 (file)
index 0000000..4ea1c2f
--- /dev/null
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include <stdio.h>
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+/*
+ * Testcase for reserved bits in Monitor Mode
+ * Control Register A (MMCRA) thresh_ctl bits.
+ * For MMCRA[48:51]/[52:55]) Threshold Start/Stop,
+ * 0b11110000/0b00001111 is reserved.
+ */
+
+static int reserved_bits_mmcra_thresh_ctl(void)
+{
+       struct event event;
+
+       /* Check for platform support for the test */
+       SKIP_IF(platform_check_for_tests());
+
+       /* Skip for Generic compat PMU */
+       SKIP_IF(check_for_generic_compat_pmu());
+
+       /*
+        * MMCRA[48:51]/[52:55]) Threshold Start/Stop
+        * events Selection. 0b11110000/0b00001111 is reserved.
+        * Expected to fail when using these reserved values.
+        */
+       event_init(&event, 0xf0340401e0);
+       FAIL_IF(!event_open(&event));
+
+       event_init(&event, 0x0f340401e0);
+       FAIL_IF(!event_open(&event));
+
+       return 0;
+}
+
+int main(void)
+{
+       return test_harness(reserved_bits_mmcra_thresh_ctl, "reserved_bits_mmcra_thresh_ctl");
+}