e1000e: issues in Sx on 82577/8/9

A workaround was previously put in the driver to reset the device when
transitioning to Sx in order to activate the changed settings of the PHY
OEM bits (Low Power Link Up, or LPLU, and GbE disable configuration) for
82577/8/9 devices.  After further review, it was found such a reset can
cause the 82579 to confuse which version of 82579 it actually is and broke
LPLU on all 82577/8/9 devices.  The workaround during an S0->Sx transition
on 82579 (instead of resetting the PHY) is to restart auto-negotiation
after the OEM bits are configured; the restart of auto-negotiation
activates the new OEM bits as does the reset.  With 82577/8, the reset is
changed to a generic reset which fixes the LPLU bits getting set wrong.

(backported from commit 92fe173391b3e0d0a7212fa8b9d72c8d61f31c26)
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Joe Jin <joe.jin@oracle.com>

diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 7ea7362a5deb0f9cc578dcb81175a17294541de2..2401d9b65160ee929efd861485db0654c5570064 100644 (file)
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -1312,10 +1312,6 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)
 
                if (mac_reg & E1000_PHY_CTRL_D0A_LPLU)
                        oem_reg |= HV_OEM_BITS_LPLU;
-
-               /* Set Restart auto-neg to activate the bits */
-               if (!e1000_check_reset_block(hw))
-                       oem_reg |= HV_OEM_BITS_RESTART_AN;
        } else {
                if (mac_reg & (E1000_PHY_CTRL_GBE_DISABLE |
                               E1000_PHY_CTRL_NOND0A_GBE_DISABLE))
@@ -1326,6 +1322,11 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)
                        oem_reg |= HV_OEM_BITS_LPLU;
        }
 
+       /* Set Restart auto-neg to activate the bits */
+       if ((d0_state || (hw->mac.type != e1000_pchlan)) &&
+           !hw->phy.ops.check_reset_block(hw))
+               oem_reg |= HV_OEM_BITS_RESTART_AN;
+
        ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg);
 
 release:
@@ -3684,7 +3685,11 @@ void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw)
 
        if (hw->mac.type >= e1000_pchlan) {
                e1000_oem_bits_config_ich8lan(hw, false);
-               e1000_phy_hw_reset_ich8lan(hw);
+
+               /* Reset PHY to activate OEM bits on 82577/8 */
+               if (hw->mac.type == e1000_pchlan)
+                       e1000e_phy_hw_reset_generic(hw);
+
                ret_val = hw->phy.ops.acquire(hw);
                if (ret_val)
                        return;