drm/amd/display: Fix for test crash due to power gating

[Why/How]
Call power gating routine only if it is defined.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Sridevi Arvindekar <sarvinde@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
index 417f2679723eea99370f30080f07b3d8cca5c3cf..95af58cbb92a50b61374c1678b60ae62ffd764dc 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
@@ -3131,7 +3131,8 @@ void dcn20_fpga_init_hw(struct dc *dc)
                res_pool->dccg->funcs->dccg_init(res_pool->dccg);
 
        //Enable ability to power gate / don't force power on permanently
-       hws->funcs.enable_power_gating_plane(hws, true);
+       if (hws->funcs.enable_power_gating_plane)
+               hws->funcs.enable_power_gating_plane(hws, true);
 
        // Specific to FPGA dccg and registers
        REG_WRITE(RBBMIF_TIMEOUT_DIS, 0xFFFFFFFF);