]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: qcom: sm8650: Add video and camera clock controllers
authorJagadeesh Kona <quic_jkona@quicinc.com>
Sun, 2 Jun 2024 11:44:39 +0000 (17:14 +0530)
committerBjorn Andersson <andersson@kernel.org>
Wed, 26 Jun 2024 02:51:59 +0000 (21:51 -0500)
Add device nodes for video and camera clock controllers on Qualcomm
SM8650 platform.

Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240602114439.1611-9-quic_jkona@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sm8650.dtsi

index 8af151d924f9494fdf2129c84634a97e5a528589..9d9bbb9aca64456fa8e6eee0aad6bd3524dfca8d 100644 (file)
@@ -4,10 +4,12 @@
  */
 
 #include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/clock/qcom,sm8650-camcc.h>
 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
+#include <dt-bindings/clock/qcom,sm8650-videocc.h>
 #include <dt-bindings/dma/qcom-gpi.h>
 #include <dt-bindings/firmware/qcom,scm.h>
 #include <dt-bindings/gpio/gpio.h>
                        };
                };
 
+               videocc: clock-controller@aaf0000 {
+                       compatible = "qcom,sm8650-videocc";
+                       reg = <0 0x0aaf0000 0 0x10000>;
+                       clocks = <&bi_tcxo_div2>,
+                                <&gcc GCC_VIDEO_AHB_CLK>;
+                       power-domains = <&rpmhpd RPMHPD_MMCX>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #power-domain-cells = <1>;
+               };
+
+               camcc: clock-controller@ade0000 {
+                       compatible = "qcom,sm8650-camcc";
+                       reg = <0 0x0ade0000 0 0x20000>;
+                       clocks = <&gcc GCC_CAMERA_AHB_CLK>,
+                                <&bi_tcxo_div2>,
+                                <&bi_tcxo_ao_div2>,
+                                <&sleep_clk>;
+                       power-domains = <&rpmhpd RPMHPD_MMCX>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #power-domain-cells = <1>;
+               };
+
                mdss: display-subsystem@ae00000 {
                        compatible = "qcom,sm8650-mdss";
                        reg = <0 0x0ae00000 0 0x1000>;