]> www.infradead.org Git - linux.git/commitdiff
ARM: dts: aspeed: catalina: Add pdb cpld io expander
authorPotin Lai <potin.lai.pt@gmail.com>
Fri, 23 Aug 2024 06:41:10 +0000 (14:41 +0800)
committerJoel Stanley <joel@jms.id.au>
Tue, 27 Aug 2024 03:30:34 +0000 (13:00 +0930)
Add more IO expanders which are emulated by the PDB CPLD.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://lore.kernel.org/r/20240823-catalina-ioexp-update-v1-1-4bfd8dad819c@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts

index a62c30f2c0df81cf6e6fe19c92bbb53fca8927b6..3a00182084a53eb3945c2608d0f628f7c09da614 100644 (file)
 
 &i2c14 {
        status = "okay";
+
+       // PDB CPLD IOEXP 0x10
+       io_expander9: gpio@10 {
+               compatible = "nxp,pca9555";
+               interrupt-parent = <&gpio0>;
+               interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
+               reg = <0x10>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       // PDB CPLD IOEXP 0x11
+       io_expander10: gpio@11 {
+               compatible = "nxp,pca9555";
+               interrupt-parent = <&gpio0>;
+               interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
+               reg = <0x11>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       // PDB CPLD IOEXP 0x12
+       io_expander11: gpio@12 {
+               compatible = "nxp,pca9555";
+               interrupt-parent = <&gpio0>;
+               interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
+               reg = <0x12>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       // PDB CPLD IOEXP 0x13
+       io_expander12: gpio@13 {
+               compatible = "nxp,pca9555";
+               interrupt-parent = <&gpio0>;
+               interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
+               reg = <0x13>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       // PDB CPLD IOEXP 0x14
+       io_expander13: gpio@14 {
+               compatible = "nxp,pca9555";
+               interrupt-parent = <&gpio0>;
+               interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
+               reg = <0x14>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       // PDB CPLD IOEXP 0x15
+       io_expander14: gpio@15 {
+               compatible = "nxp,pca9555";
+               interrupt-parent = <&gpio0>;
+               interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
+               reg = <0x15>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
 };
 
 &i2c15 {
                "SEC_FNP_L_CX0","SEC_FNP_L_CX1",
                "","","","";
 };
+
+&io_expander9 {
+       gpio-line-names =
+               "LEAK3_DETECT_R","LEAK1_DETECT_R",
+               "LEAK2_DETECT_R","LEAK0_DETECT_R",
+               "CHASSIS3_LEAK_Q_N_PLD","CHASSIS1_LEAK_Q_N_PLD",
+               "CHASSIS2_LEAK_Q_N_PLD","CHASSIS0_LEAK_Q_N_PLD",
+               "P12V_AUX_FAN_ALERT_PLD_N","P12V_AUX_FAN_OC_PLD_N",
+               "P12V_AUX_FAN_FAULT_PLD_N","LEAK_DETECT_RMC_N_R",
+               "RSVD_RMC_GPIO3_R","SMB_RJ45_FIO_TMP_ALERT",
+               "","";
+};
+
+&io_expander10 {
+       gpio-line-names =
+               "FM_P12V_NIC1_FLTB_R_N","FM_P3V3_NIC1_FAULT_R_N",
+               "OCP_V3_2_PWRBRK_FROM_HOST_ISO_PLD_N",
+               "P12V_AUX_NIC1_SENSE_ALERT_R_N",
+               "FM_P12V_NIC0_FLTB_R_N","FM_P3V3_NIC0_FAULT_R_N",
+               "OCP_SFF_PWRBRK_FROM_HOST_ISO_PLD_N",
+               "P12V_AUX_NIC0_SENSE_ALERT_R_N",
+               "P12V_AUX_PSU_SMB_ALERT_R_L","P12V_SCM_SENSE_ALERT_R_N",
+               "NODEB_PSU_SMB_ALERT_R_L","NODEA_PSU_SMB_ALERT_R_L",
+               "P52V_SENSE_ALERT_PLD_N","P48V_HS2_FAULT_N_PLD",
+               "P48V_HS1_FAULT_N_PLD","";
+};
+
+&io_expander11 {
+       gpio-line-names =
+               "FAN_7_PRESENT_N","FAN_6_PRESENT_N",
+               "FAN_5_PRESENT_N","FAN_4_PRESENT_N",
+               "FAN_3_PRESENT_N","FAN_2_PRESENT_N",
+               "FAN_1_PRESENT_N","FAN_0_PRESENT_N",
+               "PRSNT_CHASSIS3_LEAK_CABLE_R_N","PRSNT_CHASSIS1_LEAK_CABLE_R_N",
+               "PRSNT_CHASSIS2_LEAK_CABLE_R_N","PRSNT_CHASSIS0_LEAK_CABLE_R_N",
+               "PRSNT_RJ45_FIO_N_R","PRSNT_HDDBD_POWER_CABLE_N",
+               "PRSNT_OSFP_POWER_CABLE_N","";
+};
+
+&io_expander12 {
+       gpio-line-names =
+               "RST_OCP_V3_1_R_N","NIC0_PERST_N",
+               "OCP_SFF_PERST_FROM_HOST_ISO_PLD_N","OCP_SFF_MAIN_PWR_EN",
+               "FM_OCP_SFF_PWR_GOOD_PLD","OCP_SFF_AUX_PWR_PLD_EN_R",
+               "HP_LVC3_OCP_V3_1_PWRGD_PLD","HP_OCP_V3_1_HSC_PWRGD_PLD_R",
+               "RST_OCP_V3_2_R_N","NIC1_PERST_N",
+               "OCP_V3_2_PERST_FROM_HOST_ISO_PLD_N","OCP_V3_2_MAIN_PWR_EN",
+               "FM_OCP_V3_2_PWR_GOOD_PLD","OCP_V3_2_AUX_PWR_PLD_EN_R",
+               "HP_LVC3_OCP_V3_2_PWRGD_PLD","HP_OCP_V3_2_HSC_PWRGD_PLD_R";
+};
+
+&io_expander13 {
+       gpio-line-names =
+               "NODEA_NODEB_PWOK_PLD_ISO_R","PWR_EN_NICS",
+               "PWRGD_P12V_AUX_FAN_PLD","P12V_AUX_FAN_EN_PLD",
+               "PWRGD_P3V3_AUX_PLD","PWRGD_P12V_AUX_PLD_ISO_R",
+               "FM_MAIN_PWREN_FROM_RMC_R","FM_MAIN_PWREN_RMC_EN_ISO_R",
+               "PWRGD_RMC_R","PWRGD_P12V_AUX_FAN_PLD",
+               "P12V_AUX_FAN_EN_PLD","FM_SYS_THROTTLE_N",
+               "HP_LVC3_OCP_V3_2_PRSNT2_PLD_N","HP_LVC3_OCP_V3_1_PRSNT2_PLD_N",
+               "","";
+};
+
+&io_expander14 {
+       gpio-line-names =
+               "","","","","","","","",
+               "FM_BOARD_BMC_SKU_ID3","FM_BOARD_BMC_SKU_ID2",
+               "FM_BOARD_BMC_SKU_ID1","FM_BOARD_BMC_SKU_ID0",
+               "FAB_BMC_REV_ID2","FAB_BMC_REV_ID1",
+               "FAB_BMC_REV_ID0","";
+};