]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/i915/gen11: Update shadowed register table
authorMatt Roper <matthew.d.roper@intel.com>
Thu, 29 Jul 2021 05:41:16 +0000 (22:41 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Tue, 10 Aug 2021 22:34:48 +0000 (15:34 -0700)
The bspec lists many shadowed registers (i.e., registers for which we
don't need to grab forcewake when writing) that we weren't tracking in
the driver.  Although we may not actually use all of these registers
right now, it's best to just match the bspec list exactly.

Note that the bspec also lists registers that are shadowed for various
HW-internal accesses; we can ignore those and just list the ones that
are shadowed for accesses from the IA/CPU.

Bspec: 18333
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210729054118.2458523-5-matthew.d.roper@intel.com
drivers/gpu/drm/i915/intel_uncore.c

index 52601b960248b519539910cede8ee5ed4529b633..6b5b029148b25a5fe5209446fabdde541f9ac684 100644 (file)
@@ -960,20 +960,26 @@ static const struct i915_range gen11_shadowed_regs[] = {
        { .start =   0x2550, .end =   0x2550 },
        { .start =   0xA008, .end =   0xA00C },
        { .start =  0x22030, .end =  0x22030 },
-       { .start =  0x22550, .end =  0x22550 },
+       { .start =  0x22230, .end =  0x22230 },
+       { .start =  0x22510, .end =  0x22550 },
        { .start = 0x1C0030, .end = 0x1C0030 },
-       { .start = 0x1C0550, .end = 0x1C0550 },
+       { .start = 0x1C0230, .end = 0x1C0230 },
+       { .start = 0x1C0510, .end = 0x1C0550 },
        { .start = 0x1C4030, .end = 0x1C4030 },
-       { .start = 0x1C4550, .end = 0x1C4550 },
+       { .start = 0x1C4230, .end = 0x1C4230 },
+       { .start = 0x1C4510, .end = 0x1C4550 },
        { .start = 0x1C8030, .end = 0x1C8030 },
-       { .start = 0x1C8550, .end = 0x1C8550 },
+       { .start = 0x1C8230, .end = 0x1C8230 },
+       { .start = 0x1C8510, .end = 0x1C8550 },
        { .start = 0x1D0030, .end = 0x1D0030 },
-       { .start = 0x1D0550, .end = 0x1D0550 },
+       { .start = 0x1D0230, .end = 0x1D0230 },
+       { .start = 0x1D0510, .end = 0x1D0550 },
        { .start = 0x1D4030, .end = 0x1D4030 },
-       { .start = 0x1D4550, .end = 0x1D4550 },
+       { .start = 0x1D4230, .end = 0x1D4230 },
+       { .start = 0x1D4510, .end = 0x1D4550 },
        { .start = 0x1D8030, .end = 0x1D8030 },
-       { .start = 0x1D8550, .end = 0x1D8550 },
-       /* TODO: Other registers are not yet used */
+       { .start = 0x1D8230, .end = 0x1D8230 },
+       { .start = 0x1D8510, .end = 0x1D8550 },
 };
 
 static const struct i915_range gen12_shadowed_regs[] = {