]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
spi: rockchip: Fix PM runtime count on no-op cs
authorChristian Loehle <christian.loehle@arm.com>
Fri, 6 Dec 2024 19:50:55 +0000 (19:50 +0000)
committerMark Brown <broonie@kernel.org>
Mon, 9 Dec 2024 13:06:23 +0000 (13:06 +0000)
The early bail out that caused an out-of-bounds write was removed with
commit 5c018e378f91 ("spi: spi-rockchip: Fix out of bounds array
access")
Unfortunately that caused the PM runtime count to be unbalanced and
underflowed on the first call. To fix that reintroduce a no-op check
by reading the register directly.

Cc: stable@vger.kernel.org
Fixes: 5c018e378f91 ("spi: spi-rockchip: Fix out of bounds array access")
Signed-off-by: Christian Loehle <christian.loehle@arm.com>
Link: https://patch.msgid.link/1f2b3af4-2b7a-4ac8-ab95-c80120ebf44c@arm.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-rockchip.c

index 864e581674173edb240611c9d63c1985f0c9a567..1bc012fce7cb8de6411f3788d04f3a3f28ba559f 100644 (file)
@@ -241,6 +241,20 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
        struct spi_controller *ctlr = spi->controller;
        struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
        bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable;
+       bool cs_actual;
+
+       /*
+        * SPI subsystem tries to avoid no-op calls that would break the PM
+        * refcount below. It can't however for the first time it is used.
+        * To detect this case we read it here and bail out early for no-ops.
+        */
+       if (spi_get_csgpiod(spi, 0))
+               cs_actual = !!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SER) & 1);
+       else
+               cs_actual = !!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SER) &
+                              BIT(spi_get_chipselect(spi, 0)));
+       if (unlikely(cs_actual == cs_asserted))
+               return;
 
        if (cs_asserted) {
                /* Keep things powered as long as CS is asserted */