#define B43_MMIO_TSF_CFP_START_LOW     0x604
 #define B43_MMIO_TSF_CFP_START_HIGH    0x606
 #define B43_MMIO_TSF_CFP_PRETBTT       0x612
+#define B43_MMIO_TSF_CLK_FRAC_LOW      0x62E
+#define B43_MMIO_TSF_CLK_FRAC_HIGH     0x630
 #define B43_MMIO_TSF_0                 0x632   /* core rev < 3 only */
 #define B43_MMIO_TSF_1                 0x634   /* core rev < 3 only */
 #define B43_MMIO_TSF_2                 0x636   /* core rev < 3 only */
 
        case B43_PHYTYPE_N:
        case B43_PHYTYPE_LP:
        case B43_PHYTYPE_HT:
+       case B43_PHYTYPE_LCN:
                b43_rate_memory_write(dev, B43_OFDM_RATE_6MB, 1);
                b43_rate_memory_write(dev, B43_OFDM_RATE_12MB, 1);
                b43_rate_memory_write(dev, B43_OFDM_RATE_18MB, 1);
 
                break;
        case B43_LCNTAB_32BIT:
                b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, offset);
-               value = b43_phy_read(dev, B43_PHY_LCN_TABLE_DATAHI);
-               value <<= 16;
-               value |= b43_phy_read(dev, B43_PHY_LCN_TABLE_DATALO);
+               value = b43_phy_read(dev, B43_PHY_LCN_TABLE_DATALO);
+               value |= (b43_phy_read(dev, B43_PHY_LCN_TABLE_DATAHI) << 16);
                break;
        default:
                B43_WARN_ON(1);
                        break;
                case B43_LCNTAB_32BIT:
                        *((u32 *)data) = b43_phy_read(dev,
-                                                     B43_PHY_LCN_TABLE_DATAHI);
-                       *((u32 *)data) <<= 16;
-                       *((u32 *)data) |= b43_phy_read(dev,
                                                B43_PHY_LCN_TABLE_DATALO);
+                       *((u32 *)data) |= (b43_phy_read(dev,
+                                          B43_PHY_LCN_TABLE_DATAHI) << 16);
                        data += 4;
                        break;
                default: