reg = <0x40000000 0x800000>;
                ranges;
 
+               crypto: crypto@40240000 {
+                       compatible = "fsl,sec-v4.0";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       reg = <0x40240000 0x10000>;
+                       ranges = <0 0x40240000 0x10000>;
+                       clocks = <&pcc2 IMX7ULP_CLK_CAAM>,
+                                <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>;
+                       clock-names = "aclk", "ipg";
+
+                       sec_jr0: jr0@1000 {
+                               compatible = "fsl,sec-v4.0-job-ring";
+                               reg = <0x1000 0x1000>;
+                               interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+
+                       sec_jr1: jr1@2000 {
+                               compatible = "fsl,sec-v4.0-job-ring";
+                               reg = <0x2000 0x1000>;
+                               interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+               };
+
                lpuart4: serial@402d0000 {
                        compatible = "fsl,imx7ulp-lpuart";
                        reg = <0x402d0000 0x1000>;