drm/i915/userptr: Enable read-only support on gen8+

On gen8 and onwards, we can mark GPU accesses through the ppGTT as being
read-only, that is cause any GPU write onto that page to be discarded
(not triggering a fault). This is all that we need to finally support
the read-only flag for userptr!

v2: Check default address space for read only support as a proxy for the
user context/ppgtt.

Testcase: igt/gem_userptr_blits/readonly*
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Jon Bloomfield <jon.bloomfield@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180712191430.9269-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_gem_object.h b/drivers/gpu/drm/i915/i915_gem_object.h
index 56e9f00d2c4c1facd7f182e86f549e5bb16f5dc0..83e5e01fa9eaa9c8586445329089959290f2f32d 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/i915_gem_object.h
@@ -267,7 +267,6 @@ struct drm_i915_gem_object {
        union {
                struct i915_gem_userptr {
                        uintptr_t ptr;
-                       unsigned read_only :1;
 
                        struct i915_mm_struct *mm;
                        struct i915_mmu_object *mmu_object;

diff --git a/drivers/gpu/drm/i915/i915_gem_userptr.c b/drivers/gpu/drm/i915/i915_gem_userptr.c
index 854bd51b9478a59d6b0c18820c85498674842a66..dcd6e230d16aa7905c1ae075fab469e333f7ef8b 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/i915_gem_userptr.c
@@ -507,7 +507,7 @@ __i915_gem_userptr_get_pages_worker(struct work_struct *_work)
                struct mm_struct *mm = obj->userptr.mm->mm;
                unsigned int flags = 0;
 
-               if (!obj->userptr.read_only)
+               if (!i915_gem_object_is_readonly(obj))
                        flags |= FOLL_WRITE;
 
                ret = -EFAULT;
@@ -643,7 +643,7 @@ static int i915_gem_userptr_get_pages(struct drm_i915_gem_object *obj)
                if (pvec) /* defer to worker if malloc fails */
                        pinned = __get_user_pages_fast(obj->userptr.ptr,
                                                       num_pages,
-                                                      !obj->userptr.read_only,
+                                                      !i915_gem_object_is_readonly(obj),
                                                       pvec);
        }
 
@@ -789,10 +789,15 @@ i915_gem_userptr_ioctl(struct drm_device *dev,
                return -EFAULT;
 
        if (args->flags & I915_USERPTR_READ_ONLY) {
-               /* On almost all of the current hw, we cannot tell the GPU that a
-                * page is readonly, so this is just a placeholder in the uAPI.
+               struct i915_hw_ppgtt *ppgtt;
+
+               /*
+                * On almost all of the older hw, we cannot tell the GPU that
+                * a page is readonly.
                 */
-               return -ENODEV;
+               ppgtt = dev_priv->kernel_context->ppgtt;
+               if (!ppgtt || !ppgtt->vm.has_read_only)
+                       return -ENODEV;
        }
 
        obj = i915_gem_object_alloc(dev_priv);
@@ -806,7 +811,8 @@ i915_gem_userptr_ioctl(struct drm_device *dev,
        i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);
 
        obj->userptr.ptr = args->user_ptr;
-       obj->userptr.read_only = !!(args->flags & I915_USERPTR_READ_ONLY);
+       if (args->flags & I915_USERPTR_READ_ONLY)
+               i915_gem_object_set_readonly(obj);
 
        /* And keep a pointer to the current->mm for resolving the user pages
         * at binding. This means that we need to hook into the mmu_notifier