drm/xe/guc: Clean up of GuC 'CTL' defines

All the field generation for the CTL defines (used for GuC init data)
were hand-rolled rather than using FIELD_PREP/REG_GENMASK/BIT macros.

Also, there were a bunch of macros defined for verbosity settings that
were never used.

So fix that all up.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20250904195752.3846138-2-John.C.Harrison@Intel.com

diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index b3a6408a5760bda7d6ee1ae438924436f6c6055e..e56c9c5c8845e1912882eac38dcff3e7b44e6a7d 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -74,8 +74,7 @@ static u32 guc_ctl_debug_flags(struct xe_guc *guc)
        if (!GUC_LOG_LEVEL_IS_VERBOSE(level))
                flags |= GUC_LOG_DISABLED;
        else
-               flags |= GUC_LOG_LEVEL_TO_VERBOSITY(level) <<
-                        GUC_LOG_VERBOSITY_SHIFT;
+               flags |= FIELD_PREP(GUC_LOG_VERBOSITY, GUC_LOG_LEVEL_TO_VERBOSITY(level));
 
        return flags;
 }
@@ -122,22 +121,14 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc)
        BUILD_BUG_ON(!CAPTURE_BUFFER_SIZE);
        BUILD_BUG_ON(!IS_ALIGNED(CAPTURE_BUFFER_SIZE, CAPTURE_UNIT));
 
-       BUILD_BUG_ON((CRASH_BUFFER_SIZE / LOG_UNIT - 1) >
-                       (GUC_LOG_CRASH_MASK >> GUC_LOG_CRASH_SHIFT));
-       BUILD_BUG_ON((DEBUG_BUFFER_SIZE / LOG_UNIT - 1) >
-                       (GUC_LOG_DEBUG_MASK >> GUC_LOG_DEBUG_SHIFT));
-       BUILD_BUG_ON((CAPTURE_BUFFER_SIZE / CAPTURE_UNIT - 1) >
-                       (GUC_LOG_CAPTURE_MASK >> GUC_LOG_CAPTURE_SHIFT));
-
        flags = GUC_LOG_VALID |
                GUC_LOG_NOTIFY_ON_HALF_FULL |
                CAPTURE_FLAG |
                LOG_FLAG |
-               ((CRASH_BUFFER_SIZE / LOG_UNIT - 1) << GUC_LOG_CRASH_SHIFT) |
-               ((DEBUG_BUFFER_SIZE / LOG_UNIT - 1) << GUC_LOG_DEBUG_SHIFT) |
-               ((CAPTURE_BUFFER_SIZE / CAPTURE_UNIT - 1) <<
-                GUC_LOG_CAPTURE_SHIFT) |
-               (offset << GUC_LOG_BUF_ADDR_SHIFT);
+               FIELD_PREP(GUC_LOG_CRASH, CRASH_BUFFER_SIZE / LOG_UNIT - 1) |
+               FIELD_PREP(GUC_LOG_DEBUG, DEBUG_BUFFER_SIZE / LOG_UNIT - 1) |
+               FIELD_PREP(GUC_LOG_CAPTURE, CAPTURE_BUFFER_SIZE / CAPTURE_UNIT - 1) |
+               FIELD_PREP(GUC_LOG_BUF_ADDR, offset);
 
        #undef LOG_UNIT
        #undef LOG_FLAG
@@ -150,7 +141,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc)
 static u32 guc_ctl_ads_flags(struct xe_guc *guc)
 {
        u32 ads = guc_bo_ggtt_addr(guc, guc->ads.bo) >> PAGE_SHIFT;
-       u32 flags = ads << GUC_ADS_ADDR_SHIFT;
+       u32 flags = FIELD_PREP(GUC_ADS_ADDR, ads);
 
        return flags;
 }

diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
index 0508f1064178ed1a64990ce528c6342cff8ab810..457d914097c8a0e744870de7ccf9e9df05c37315 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc_fwif.h
+++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
@@ -89,13 +89,10 @@ struct guc_update_exec_queue_policy {
 #define   GUC_LOG_NOTIFY_ON_HALF_FULL  BIT(1)
 #define   GUC_LOG_CAPTURE_ALLOC_UNITS  BIT(2)
 #define   GUC_LOG_LOG_ALLOC_UNITS      BIT(3)
-#define   GUC_LOG_CRASH_SHIFT          4
-#define   GUC_LOG_CRASH_MASK           (0x3 << GUC_LOG_CRASH_SHIFT)
-#define   GUC_LOG_DEBUG_SHIFT          6
-#define   GUC_LOG_DEBUG_MASK           (0xF << GUC_LOG_DEBUG_SHIFT)
-#define   GUC_LOG_CAPTURE_SHIFT                10
-#define   GUC_LOG_CAPTURE_MASK         (0x3 << GUC_LOG_CAPTURE_SHIFT)
-#define   GUC_LOG_BUF_ADDR_SHIFT       12
+#define   GUC_LOG_CRASH                        REG_GENMASK(5, 4)
+#define   GUC_LOG_DEBUG                        REG_GENMASK(9, 6)
+#define   GUC_LOG_CAPTURE              REG_GENMASK(11, 10)
+#define   GUC_LOG_BUF_ADDR             REG_GENMASK(31, 12)
 
 #define GUC_CTL_WA                     1
 #define   GUC_WA_GAM_CREDITS           BIT(10)
@@ -117,21 +114,14 @@ struct guc_update_exec_queue_policy {
 #define   GUC_CTL_DISABLE_SCHEDULER    BIT(14)
 
 #define GUC_CTL_DEBUG                  3
-#define   GUC_LOG_VERBOSITY_SHIFT      0
-#define   GUC_LOG_VERBOSITY_LOW                (0 << GUC_LOG_VERBOSITY_SHIFT)
-#define   GUC_LOG_VERBOSITY_MED                (1 << GUC_LOG_VERBOSITY_SHIFT)
-#define   GUC_LOG_VERBOSITY_HIGH       (2 << GUC_LOG_VERBOSITY_SHIFT)
-#define   GUC_LOG_VERBOSITY_ULTRA      (3 << GUC_LOG_VERBOSITY_SHIFT)
-#define          GUC_LOG_VERBOSITY_MIN         0
+#define   GUC_LOG_VERBOSITY            REG_GENMASK(1, 0)
 #define          GUC_LOG_VERBOSITY_MAX         3
-#define          GUC_LOG_VERBOSITY_MASK        0x0000000f
-#define          GUC_LOG_DESTINATION_MASK      (3 << 4)
-#define   GUC_LOG_DISABLED             (1 << 6)
-#define   GUC_PROFILE_ENABLED          (1 << 7)
+#define          GUC_LOG_DESTINATION           REG_GENMASK(5, 4)
+#define   GUC_LOG_DISABLED             BIT(6)
+#define   GUC_PROFILE_ENABLED          BIT(7)
 
 #define GUC_CTL_ADS                    4
-#define   GUC_ADS_ADDR_SHIFT           1
-#define   GUC_ADS_ADDR_MASK            (0xFFFFF << GUC_ADS_ADDR_SHIFT)
+#define   GUC_ADS_ADDR                 REG_GENMASK(21, 1)
 
 #define GUC_CTL_DEVID                  5