* Fix password protection on ARM;

  prepare TRAB board for password protection

* Must use BRG to clock ethernet in POST tests or tests will fail
  (a) because of timeouts while waiting for the PHY to come up or
  (b) when no cable is connected

diff --git a/CHANGELOG b/CHANGELOG
index fafda64c188fc8bb3229843f592ec5cb9ab14c15..1df9103098b16d689515401e9f0718fbdbe546e8 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,13 @@
 Modifications since 1.2.0:
 ======================================================================
 
+* Fix password protection on ARM;
+  prepare TRAB board for password protection
+
+* Must use BRG to clock ethernet in POST tests or tests will fail
+  (a) because of timeouts while waiting for the PHY to come up or
+  (b) when no cable is connected
+
 * Misc fixes to boot on boards with short watchdog periods (lwmon)
 
 * Misc fixes for xscale boards

diff --git a/cpu/arm920t/interrupts.c b/cpu/arm920t/interrupts.c
index bb915c853495dfe7edfc42d004f1baafb96dd1b1..4a622ab93e23b1e5c1dce5e33568932e78d9f03d 100644 (file)
--- a/cpu/arm920t/interrupts.c
+++ b/cpu/arm920t/interrupts.c
@@ -304,3 +304,29 @@ void udelay_masked (unsigned long usec)
        while (get_timer_masked () < tmo)
                /*NOP*/;
 }
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+       return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk (void)
+{
+       ulong tbclk;
+
+#if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB)
+       tbclk = timer_load_val * 100;
+#elif defined(CONFIG_SMDK2410)
+       tbclk = CFG_HZ;
+#endif
+
+       return tbclk;
+}

diff --git a/include/configs/trab.h b/include/configs/trab.h
index c3c3b062dddd40776330071b6ac4a43d8dadddc8..8cf13236fdc56781a6a743b5e73a6f1a667cad4d 100644 (file)
--- a/include/configs/trab.h
+++ b/include/configs/trab.h
@@ -78,6 +78,7 @@
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
 
+
 #define CONFIG_BOOTDELAY       5
 #define CONFIG_BOOTARGS        "console=ttyS0"
 #define CONFIG_ETHADDR         00:D0:93:00:61:11
@@ -103,6 +104,12 @@
        "kernel_addr=00040000\0" \
        "flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0"
 
+#if 0  /* disabled for development */
+#define        CONFIG_AUTOBOOT_KEYED           /* Enable password protection   */
+#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
+#define CONFIG_AUTOBOOT_DELAY_STR      "system"        /* 1st password */
+#endif
+
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   115200          /* speed to run kgdb serial port */
 /* what's this ? it's not used anywhere */

diff --git a/post/ether.c b/post/ether.c
index 93de3abe0617d23a2d4059eafde8563f7f6a919c..5045f9dec62107c388608218d3b9cf0a2cfefffa 100644 (file)
--- a/post/ether.c
+++ b/post/ether.c
@@ -152,7 +152,7 @@ CPM_CR_CH_SCC4 };
                                         dpram_alloc_align (sizeof (RTXBD), 8));
 #else
        rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + CPM_SCC_BASE);
-#endif /* 0 */
+#endif
 
 #if 0
 
@@ -187,14 +187,10 @@ CPM_CR_CH_SCC4 };
        immr->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
        immr->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);
 
-#endif /* 0 */
-
-#if 1
        /* Configure port A for TCLK and RCLK.
         */
        immr->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK);
        immr->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK);
-#endif /* 1 */
 
        /*
         * Configure Serial Interface clock routing -- see section 16.7.5.3
@@ -203,6 +199,17 @@ CPM_CR_CH_SCC4 };
 
        immr->im_cpm.cp_sicr &= ~SICR_ENET_MASK;
        immr->im_cpm.cp_sicr |= SICR_ENET_CLKRT;
+#else
+       /*
+        * SCC2 receive clock is BRG2
+        * SCC2 transmit clock is BRG3
+        */
+       immr->im_cpm.cp_brgc2 = 0x0001000C;
+       immr->im_cpm.cp_brgc3 = 0x0001000C;
+       
+       immr->im_cpm.cp_sicr &= ~0x00003F00;
+       immr->im_cpm.cp_sicr |=  0x00000a00;
+#endif /* 0 */
 
 
        /*
@@ -374,8 +381,7 @@ CPM_CR_CH_SCC4 };
        immr->im_cpm.cp_scc[scc_index].scc_psmr = SCC_PSMR_ENCRC |
                        SCC_PSMR_NIB22 | SCC_PSMR_LPB;
 
-#if 1
-
+#if 0
        /*
         * Configure Ethernet TENA Signal
         */
@@ -390,10 +396,6 @@ CPM_CR_CH_SCC4 };
 #error Configuration Error: exactly ONE of PB_ENET_TENA, PC_ENET_TENA must be defined
 #endif
 
-#endif /* 1 */
-
-#if 0
-
 #if defined(CONFIG_ADS) && defined(CONFIG_MPC860)
        /*
         * Port C is used to control the PHY,MC68160.