]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
arm64: dts: freescale: imx93-phyboard-segin: Add CAN support
authorPrimoz Fiser <primoz.fiser@norik.com>
Tue, 22 Apr 2025 10:56:40 +0000 (12:56 +0200)
committerShawn Guo <shawnguo@kernel.org>
Fri, 9 May 2025 10:10:06 +0000 (18:10 +0800)
Add support for CAN networking on phyBOARD-Segin-i.MX93 via the flexcan1
interface. The CAN PHY chip SN65HVD234D used on the board is compatible
with the TCAN1043 driver using the generic "can-transceiver-phy" and is
capable of up to 1Mbps data rate.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts

index 38b89398e646d9141018ea4f3901b95b5a3d633a..be9c0a436734451f5d373c5f518f0ca3324e6025 100644 (file)
                stdout-path = &lpuart1;
        };
 
+       flexcan1_tc: can-phy0 {
+               compatible = "ti,tcan1043";
+               #phy-cells = <0>;
+               max-bitrate = <1000000>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_flexcan1_tc>;
+               enable-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
+       };
+
        reg_usdhc2_vmmc: regulator-usdhc2 {
                compatible = "regulator-fixed";
                enable-active-high;
        };
 };
 
+/* CAN */
+&flexcan1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan1>;
+       phys = <&flexcan1_tc>;
+       status = "okay";
+};
+
 /* I2C2 */
 &lpi2c2 {
        clock-frequency = <400000>;
 };
 
 &iomuxc {
+       pinctrl_flexcan1: flexcan1grp {
+               fsl,pins = <
+                       MX93_PAD_PDM_BIT_STREAM0__CAN1_RX       0x139e
+                       MX93_PAD_PDM_CLK__CAN1_TX               0x139e
+               >;
+       };
+
+       pinctrl_flexcan1_tc: flexcan1tcgrp {
+               fsl,pins = <
+                       MX93_PAD_ENET2_TD3__GPIO4_IO16          0x31e
+               >;
+       };
+
        pinctrl_lpi2c2: lpi2c2grp {
                fsl,pins = <
                        MX93_PAD_I2C2_SCL__LPI2C2_SCL           0x40000b9e