arm64: dts: sc7180: add bus clock to mdp node for sc7180 target

Move the bus clock to mdp device node,in order
to facilitate bus band width scaling on sc7180
target.

The parent device MDSS will not vote for bus bw,
instead the vote will be triggered by mdp device
node. Since a minimum vote is required to turn
on bus clock, move the clock node to mdp device
from where the votes are requested.

This patch has dependency on the below series
https://patchwork.kernel.org/patch/11468783/

Reviewed-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Link: https://lore.kernel.org/r/1594899334-19772-2-git-send-email-kalyan_t@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index e7c4762449dff462f171a62e33a248ca3cb318a3..12fede0532a3425e5593eb51d2b136d4e83365bb 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -2800,10 +2800,9 @@
                        power-domains = <&dispcc MDSS_GDSC>;
 
                        clocks = <&gcc GCC_DISP_AHB_CLK>,
-                                <&gcc GCC_DISP_HF_AXI_CLK>,
                                 <&dispcc DISP_CC_MDSS_AHB_CLK>,
                                 <&dispcc DISP_CC_MDSS_MDP_CLK>;
-                       clock-names = "iface", "bus", "ahb", "core";
+                       clock-names = "iface", "ahb", "core";
 
                        assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
                        assigned-clock-rates = <300000000>;
@@ -2829,12 +2828,13 @@
                                      <0 0x0aeb0000 0 0x2008>;
                                reg-names = "mdp", "vbif";
 
-                               clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+                               clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+                                        <&dispcc DISP_CC_MDSS_AHB_CLK>,
                                         <&dispcc DISP_CC_MDSS_ROT_CLK>,
                                         <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
                                         <&dispcc DISP_CC_MDSS_MDP_CLK>,
                                         <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
-                               clock-names = "iface", "rot", "lut", "core",
+                               clock-names = "bus", "iface", "rot", "lut", "core",
                                              "vsync";
                                assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
                                                  <&dispcc DISP_CC_MDSS_VSYNC_CLK>,