drm/amd/display: DSC Clock enable debugfs write entry

[Why]
Need a mechanism to force enable DSC on any connector

[How]
Debugfs entry overwrites newly added connector's dsc preffered
settings structure and sets dsc_clock_en flag on it.
During the attomic commit, depending if connector is SST or
MST, we will enable DSC manually by overwriting stream's DSC flag.

Signed-off-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 9b4808529a539aaa363c60d0030882a43c94190f..eaec386b31c9948d8770ea96fb3efe0e5300db89 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4659,7 +4659,7 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
                                                             dc_link_get_link_cap(aconnector->dc_link));
 
 #if defined(CONFIG_DRM_AMD_DC_DCN)
-               if (dsc_caps.is_dsc_supported)
+               if (dsc_caps.is_dsc_supported) {
                        if (dc_dsc_compute_config(aconnector->dc_link->ctx->dc->res_pool->dscs[0],
                                                  &dsc_caps,
                                                  aconnector->dc_link->ctx->dc->debug.dsc_min_slice_height_override,
@@ -4667,6 +4667,9 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
                                                  &stream->timing,
                                                  &stream->timing.dsc_cfg))
                                stream->timing.flags.DSC = 1;
+                       if (aconnector->dsc_settings.dsc_clock_en)
+                               stream->timing.flags.DSC = 1;
+               }
 #endif
        }
 

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index dd1559c743c2c437cdd04d98046c20874d358dfe..56f50a309eba26ad92d009fee45a79fb17709ee8 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -342,6 +342,10 @@ struct amdgpu_display_manager {
        struct amdgpu_encoder mst_encoders[AMDGPU_DM_MAX_CRTC];
 };
 
+struct dsc_preferred_settings {
+       bool dsc_clock_en;
+};
+
 struct amdgpu_dm_connector {
 
        struct drm_connector base;
@@ -389,6 +393,7 @@ struct amdgpu_dm_connector {
        uint32_t debugfs_dpcd_size;
 #endif
        bool force_yuv420_output;
+       struct dsc_preferred_settings dsc_settings;
 };
 
 #define to_amdgpu_dm_connector(x) container_of(x, struct amdgpu_dm_connector, base)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index e5a6d91159498cc50a75c90744ed064474dc7cf8..5322bc13af3c9448ca1697b41a124f87d8f84d72 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -980,6 +980,21 @@ static ssize_t dp_dpcd_data_read(struct file *f, char __user *buf,
        return read_size - r;
 }
 
+/* function: read DSC status on the connector
+ *
+ * The read function: dp_dsc_clock_en_read
+ * returns current status of DSC clock on the connector.
+ * The return is a boolean flag: 1 or 0.
+ *
+ * Access it with the following command (you need to specify
+ * connector like DP-1):
+ *
+ *     cat /sys/kernel/debug/dri/0/DP-X/dsc_clock_en
+ *
+ * Expected output:
+ * 1 - means that DSC is currently enabled
+ * 0 - means that DSC is disabled
+ */
 static ssize_t dp_dsc_clock_en_read(struct file *f, char __user *buf,
                                    size_t size, loff_t *pos)
 {
@@ -1037,6 +1052,79 @@ static ssize_t dp_dsc_clock_en_read(struct file *f, char __user *buf,
        return result;
 }
 
+/* function: write force DSC on the connector
+ *
+ * The write function: dp_dsc_clock_en_write
+ * enables to force DSC on the connector.
+ * User can write to either force enable DSC
+ * on the next modeset or set it to driver default
+ *
+ * Writing DSC settings is done with the following command:
+ * - To force enable DSC (you need to specify
+ * connector like DP-1):
+ *
+ *     echo 0x1 > /sys/kernel/debug/dri/0/DP-X/dsc_clock_en
+ *
+ * - To return to default state set the flag to zero and
+ * let driver deal with DSC automatically
+ * (you need to specify connector like DP-1):
+ *
+ *     echo 0x0 > /sys/kernel/debug/dri/0/DP-X/dsc_clock_en
+ *
+ */
+static ssize_t dp_dsc_clock_en_write(struct file *f, const char __user *buf,
+                                    size_t size, loff_t *pos)
+{
+       struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
+       struct pipe_ctx *pipe_ctx;
+       int i;
+       char *wr_buf = NULL;
+       uint32_t wr_buf_size = 42;
+       int max_param_num = 1;
+       long param[1] = {0};
+       uint8_t param_nums = 0;
+
+       if (size == 0)
+               return -EINVAL;
+
+       wr_buf = kcalloc(wr_buf_size, sizeof(char), GFP_KERNEL);
+
+       if (!wr_buf) {
+               DRM_DEBUG_DRIVER("no memory to allocate write buffer\n");
+               return -ENOSPC;
+       }
+
+       if (parse_write_buffer_into_params(wr_buf, wr_buf_size,
+                                           (long *)param, buf,
+                                           max_param_num,
+                                           &param_nums)) {
+               kfree(wr_buf);
+               return -EINVAL;
+       }
+
+       if (param_nums <= 0) {
+               DRM_DEBUG_DRIVER("user data not be read\n");
+               kfree(wr_buf);
+               return -EINVAL;
+       }
+
+       for (i = 0; i < MAX_PIPES; i++) {
+               pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
+                       if (pipe_ctx && pipe_ctx->stream &&
+                           pipe_ctx->stream->link == aconnector->dc_link)
+                               break;
+       }
+
+       if (!pipe_ctx || !pipe_ctx->stream)
+               goto done;
+
+       aconnector->dsc_settings.dsc_clock_en = param[0];
+
+done:
+       kfree(wr_buf);
+       return size;
+}
+
 static ssize_t dp_dsc_slice_width_read(struct file *f, char __user *buf,
                                    size_t size, loff_t *pos)
 {
@@ -1446,6 +1534,7 @@ DEFINE_SHOW_ATTRIBUTE(hdcp_sink_capability);
 static const struct file_operations dp_dsc_clock_en_debugfs_fops = {
        .owner = THIS_MODULE,
        .read = dp_dsc_clock_en_read,
+       .write = dp_dsc_clock_en_write,
        .llseek = default_llseek
 };
 

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index e85b58f0f41663f844d013dd7faefe4a84bc9b42..bb03aa608123457bf78321dbd59d0f17f4cf50b8 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -450,6 +450,7 @@ struct dsc_mst_fairness_params {
        struct dc_dsc_bw_range bw_range;
        bool compression_possible;
        struct drm_dp_mst_port *port;
+       bool clock_overwrite;
 };
 
 struct dsc_mst_fairness_vars {
@@ -615,7 +616,9 @@ static void try_disable_dsc(struct drm_atomic_state *state,
        int remaining_to_try = 0;
 
        for (i = 0; i < count; i++) {
-               if (vars[i].dsc_enabled && vars[i].bpp_x16 == params[i].bw_range.max_target_bpp_x16) {
+               if (vars[i].dsc_enabled
+                               && vars[i].bpp_x16 == params[i].bw_range.max_target_bpp_x16
+                               && !params[i].clock_overwrite) {
                        kbps_increase[i] = params[i].bw_range.stream_kbps - params[i].bw_range.max_kbps;
                        tried[i] = false;
                        remaining_to_try += 1;
@@ -676,6 +679,7 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,
        struct dsc_mst_fairness_vars vars[MAX_PIPES];
        struct amdgpu_dm_connector *aconnector;
        int count = 0;
+       bool debugfs_overwrite = false;
 
        memset(params, 0, sizeof(params));
 
@@ -694,6 +698,9 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,
                params[count].sink = stream->sink;
                aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
                params[count].port = aconnector->port;
+               params[count].clock_overwrite = aconnector->dsc_settings.dsc_clock_en;
+               if (params[count].clock_overwrite)
+                       debugfs_overwrite = true;
                params[count].compression_possible = stream->sink->dsc_caps.dsc_dec_caps.is_dsc_supported;
                dc_dsc_get_policy_for_timing(params[count].timing, &dsc_policy);
                if (!dc_dsc_compute_bandwidth_range(
@@ -719,7 +726,7 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,
                                                 dm_mst_get_pbn_divider(dc_link)) < 0)
                        return false;
        }
-       if (!drm_dp_mst_atomic_check(state)) {
+       if (!drm_dp_mst_atomic_check(state) && !debugfs_overwrite) {
                set_dsc_configs_from_fairness_vars(params, vars, count);
                return true;
        }