#define                OV5645_CHIP_ID_HIGH_BYTE        0x56
 #define OV5645_CHIP_ID_LOW             0x300b
 #define                OV5645_CHIP_ID_LOW_BYTE         0x45
+#define OV5645_IO_MIPI_CTRL00          0x300e
+#define OV5645_PAD_OUTPUT00            0x3019
 #define OV5645_AWB_MANUAL_CONTROL      0x3406
 #define                OV5645_AWB_MANUAL_ENABLE        BIT(0)
 #define OV5645_AEC_PK_MANUAL           0x3503
 #define                OV5645_ISP_VFLIP                BIT(2)
 #define OV5645_TIMING_TC_REG21         0x3821
 #define                OV5645_SENSOR_MIRROR            BIT(1)
+#define OV5645_MIPI_CTRL00             0x4800
 #define OV5645_PRE_ISP_TEST_SETTING_1  0x503d
 #define                OV5645_TEST_PATTERN_MASK        0x3
 #define                OV5645_SET_TEST_PATTERN(x)      ((x) & OV5645_TEST_PATTERN_MASK)
        { 0x3503, 0x07 },
        { 0x3002, 0x1c },
        { 0x3006, 0xc3 },
-       { 0x300e, 0x45 },
        { 0x3017, 0x00 },
        { 0x3018, 0x00 },
        { 0x302e, 0x0b },
        { 0x3a1f, 0x14 },
        { 0x0601, 0x02 },
        { 0x3008, 0x42 },
-       { 0x3008, 0x02 }
+       { 0x3008, 0x02 },
+       { OV5645_IO_MIPI_CTRL00, 0x40 },
+       { OV5645_MIPI_CTRL00, 0x24 },
+       { OV5645_PAD_OUTPUT00, 0x70 }
 };
 
 static const struct reg_value ov5645_setting_sxga[] = {
                                goto exit;
                        }
 
-                       ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
-                                              OV5645_SYSTEM_CTRL0_STOP);
-                       if (ret < 0) {
-                               ov5645_set_power_off(ov5645);
-                               goto exit;
-                       }
+                       usleep_range(500, 1000);
                } else {
+                       ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
                        ov5645_set_power_off(ov5645);
                }
        }
                        dev_err(ov5645->dev, "could not sync v4l2 controls\n");
                        return ret;
                }
+
+               ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x45);
+               if (ret < 0)
+                       return ret;
+
                ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
                                       OV5645_SYSTEM_CTRL0_START);
                if (ret < 0)
                        return ret;
        } else {
+               ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x40);
+               if (ret < 0)
+                       return ret;
+
                ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
                                       OV5645_SYSTEM_CTRL0_STOP);
                if (ret < 0)