#include "../comedidev.h"
 
-#include "8253.h"
 #include "plx9052.h"
 #include "comedi_fc.h"
+#include "comedi_8254.h"
 
 #define PCI9111_FIFO_HALF_SIZE 512
 
        unsigned int chunk_counter;
        unsigned int chunk_num_samples;
 
-       unsigned int div1;
-       unsigned int div2;
-
        unsigned short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
 };
 
        outb(flags, io_base + PLX9052_INTCSR);
 }
 
-static void pci9111_timer_set(struct comedi_device *dev)
-{
-       struct pci9111_private_data *dev_private = dev->private;
-       unsigned long timer_base = dev->iobase + PCI9111_8254_BASE_REG;
-
-       i8254_set_mode(timer_base, 1, 0, I8254_MODE0 | I8254_BINARY);
-       i8254_set_mode(timer_base, 1, 1, I8254_MODE2 | I8254_BINARY);
-       i8254_set_mode(timer_base, 1, 2, I8254_MODE2 | I8254_BINARY);
-
-       udelay(1);
-
-       i8254_write(timer_base, 1, 2, dev_private->div2);
-       i8254_write(timer_base, 1, 1, dev_private->div1);
-}
-
 enum pci9111_ISC0_sources {
        irq_on_eoc,
        irq_on_fifo_half_full
                                  struct comedi_subdevice *s,
                                  struct comedi_cmd *cmd)
 {
-       struct pci9111_private_data *dev_private = dev->private;
        int err = 0;
        unsigned int arg;
 
 
        if (cmd->convert_src == TRIG_TIMER) {
                arg = cmd->convert_arg;
-               i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
-                                         &dev_private->div1,
-                                         &dev_private->div2,
-                                         &arg, cmd->flags);
+               comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
                err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
        }
 
        dev_private->scan_delay = 0;
        if (cmd->convert_src == TRIG_TIMER) {
                trig |= PCI9111_AI_TRIG_CTRL_TPST;
-               pci9111_timer_set(dev);
+               comedi_8254_update_divisors(dev->pacer);
+               comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
                pci9111_fifo_reset(dev);
                pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
                                             irq_on_timer_tick);
        /* disable A/D triggers (software trigger mode) and auto scan off */
        outb(0, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
 
-       /* Reset 8254 chip */
-       dev_private->div1 = 0;
-       dev_private->div2 = 0;
-       pci9111_timer_set(dev);
-
        return 0;
 }
 
                        dev->irq = pcidev->irq;
        }
 
+       dev->pacer = comedi_8254_init(dev->iobase + PCI9111_8254_BASE_REG,
+                                     I8254_OSC_BASE_2MHZ, I8254_IO16, 0);
+       if (!dev->pacer)
+               return -ENOMEM;
+
        ret = comedi_alloc_subdevices(dev, 4);
        if (ret)
                return ret;