ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13

Both instances ethernet based on GMAC SNPS IP on stm32mp13.
GMAC IP version is SNPS 4.20.

Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
index 6704ceef284d31dfef66c1093eaf338ebcf99427..e1a764d269d27338bc88e942f183a2e03226735c 100644 (file)
--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
@@ -979,6 +979,12 @@
                        ts_cal2: calib@5e {
                                reg = <0x5e 0x2>;
                        };
+                       ethernet_mac1_address: mac1@e4 {
+                               reg = <0xe4 0x6>;
+                       };
+                       ethernet_mac2_address: mac2@ea {
+                               reg = <0xea 0x6>;
+                       };
                };
 
                etzpc: bus@5c007000 {
@@ -1505,6 +1511,38 @@
                                status = "disabled";
                        };
 
+                       ethernet1: ethernet@5800a000 {
+                               compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
+                               reg = <0x5800a000 0x2000>;
+                               reg-names = "stmmaceth";
+                               interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+                                                     <&exti 68 1>;
+                               interrupt-names = "macirq", "eth_wake_irq";
+                               clock-names = "stmmaceth",
+                                             "mac-clk-tx",
+                                             "mac-clk-rx",
+                                             "ethstp",
+                                             "eth-ck";
+                               clocks = <&rcc ETH1MAC>,
+                                        <&rcc ETH1TX>,
+                                        <&rcc ETH1RX>,
+                                        <&rcc ETH1STP>,
+                                        <&rcc ETH1CK_K>;
+                               st,syscon = <&syscfg 0x4 0xff0000>;
+                               snps,mixed-burst;
+                               snps,pbl = <2>;
+                               snps,axi-config = <&stmmac_axi_config_1>;
+                               snps,tso;
+                               access-controllers = <&etzpc 48>;
+                               status = "disabled";
+
+                               stmmac_axi_config_1: stmmac-axi-config {
+                                       snps,blen = <0 0 0 0 16 8 4>;
+                                       snps,rd_osr_lmt = <0x7>;
+                                       snps,wr_osr_lmt = <0x7>;
+                               };
+                       };
+
                        usbphyc: usbphyc@5a006000 {
                                #address-cells = <1>;
                                #size-cells = <0>;

diff --git a/arch/arm/boot/dts/st/stm32mp133.dtsi b/arch/arm/boot/dts/st/stm32mp133.dtsi
index 3e394c8e58b9239e83574bd4e254cb3c253dc3e4..73e470019ce426c9cafdbff0b4498c6fb3918f35 100644 (file)
--- a/arch/arm/boot/dts/st/stm32mp133.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp133.dtsi
@@ -68,4 +68,35 @@
                        };
                };
        };
+
+       ethernet2: ethernet@5800e000 {
+               compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
+               reg = <0x5800e000 0x2000>;
+               reg-names = "stmmaceth";
+               interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "macirq";
+               clock-names = "stmmaceth",
+                             "mac-clk-tx",
+                             "mac-clk-rx",
+                             "ethstp",
+                             "eth-ck";
+               clocks = <&rcc ETH2MAC>,
+                        <&rcc ETH2TX>,
+                        <&rcc ETH2RX>,
+                        <&rcc ETH2STP>,
+                        <&rcc ETH2CK_K>;
+               st,syscon = <&syscfg 0x4 0xff000000>;
+               snps,mixed-burst;
+               snps,pbl = <2>;
+               snps,axi-config = <&stmmac_axi_config_2>;
+               snps,tso;
+               access-controllers = <&etzpc 49>;
+               status = "disabled";
+
+               stmmac_axi_config_2: stmmac-axi-config {
+                       snps,blen = <0 0 0 0 16 8 4>;
+                       snps,rd_osr_lmt = <0x7>;
+                       snps,wr_osr_lmt = <0x7>;
+               };
+       };
 };