* Add support for direct TFTP download to flash memory (optional).

  Patch by David Petersen, 26 Oct 2001

* Adapt to new watchdog on LWMON board; re-trigger watchdog in all
  udelay() loops.

* Patch by Stefan Roese, 13 Nov 2001:
- CFG_CMG_ELF added (bootelf, bootvx and VxWorks image type for
  bootm). Commands bootelf/bootvx not in CFG_CMD_BEDBUG any more (all
  targets using Bedbug changed to use CFG_CMD_ELF too).
- Minor bug fixed in ppc405gp ethernet driver.
- Generic ppc405 EBC (External Bus Controller) setup added. No need
  for assembler code in board/init.S (see ESD CPCI405 board).
- Some ESD board setups remorked.

* Make PPCBoot build on OpenBSD (x86 and PPC)
  Patch by Rich Ireland, 2 Oct 2001

* Minor fixes/modifcations to CCM configuration

* Add support for FEC on TQM855L(T)/TQM860L(T,P);
  pass config options via Makefile target names

* Fix CU824 flash driver to work with all write sizes

diff --git a/CHANGELOG b/CHANGELOG
index 5e4c1b045c8a9ed3f69a9d384cee5c10bb485616..fd6673471a6d1707fe85da6d345fb07433758c9c 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -56,6 +56,31 @@ To do:
 Modifications for 1.1.1:
 ======================================================================
 
+* Add support for direct TFTP download to flash memory (optional).
+  Patch by David Petersen, 26 Oct 2001
+
+* Adapt to new watchdog on LWMON board; re-trigger watchdog in all
+  udelay() loops.
+
+* Patch by Stefan Roese, 13 Nov 2001:
+- CFG_CMG_ELF added (bootelf, bootvx and VxWorks image type for
+  bootm). Commands bootelf/bootvx not in CFG_CMD_BEDBUG any more (all
+  targets using Bedbug changed to use CFG_CMD_ELF too).
+- Minor bug fixed in ppc405gp ethernet driver.
+- Generic ppc405 EBC (External Bus Controller) setup added. No need
+  for assembler code in board/init.S (see ESD CPCI405 board).
+- Some ESD board setups remorked.
+
+* Make PPCBoot build on OpenBSD (x86 and PPC)
+  Patch by Rich Ireland, 2 Oct 2001
+
+* Minor fixes/modifcations to CCM configuration
+
+* Add support for FEC on TQM855L(T)/TQM860L(T,P);
+  pass config options via Makefile target names
+
+* Fix CU824 flash driver to work with all write sizes
+
 * Add  status LED  support for ICU862 board
   add PCMCIA / IDE support for ICU862 board
 

diff --git a/MAKEALL b/MAKEALL
index a46ec7bb6d1252cc84d63f9607b16cd525e046e4..60b8c98369cf12b473c50c84c04848e2a177abfd 100755 (executable)
--- a/MAKEALL
+++ b/MAKEALL
@@ -78,7 +78,7 @@ LIST_all="${LIST_8xx} ${LIST_8240} ${LIST_8260} ${LIST_4xx}"
 
 #-----------------------------------------------------------------------
 
-function build_target() {
+function build_target {
        target=$1
 
        ${MAKE} distclean >/dev/null

diff --git a/Makefile b/Makefile
index bd0ed17b19bb70b3b0fcad3108ce428fa77f0d55..19ebc736a6b206bc4fbf87c50d99530c620c86d3 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -26,6 +26,7 @@ HOSTARCH := $(shell uname -m | \
            -e s/sun4u/sparc64/ \
            -e s/arm.*/arm/ \
            -e s/sa110/arm/ \
+           -e s/powerpc/ppc/ \
            -e s/macppc/ppc/)
 
 HOSTOS := $(shell uname -s | tr A-Z a-z)
@@ -334,17 +335,46 @@ SXNI855T_config:  unconfig
        echo "CPU   = mpc8xx"   >>config.mk ;   \
        echo "#include <config_$(@:_config=).h>" >config.h
 
-FPS850L_config \
-TQM823L_config \
-TQM850L_config \
-TQM855L_config \
-TQM860L_config :       unconfig
-       @echo "Configuring for $(@:_config=) Board..." ; \
+# Play some tricks for configuration selection
+# All boards can come with 80MHz clock,
+# but only 855 and 860 boards may come with FEC
+# and 823 boards may have LCD support
+xtract = $(subst _80MHz,,$(subst _FEC,,$(subst _config,,$1)))
+
+FPS850L_config         \
+TQM823L_config         \
+TQM823L_80MHz_config   \
+TQM823L_LCD_config             \
+TQM823L_LCD_80MHz_config       \
+TQM850L_config         \
+TQM850L_80MHz_config   \
+TQM855L_config         \
+TQM855L_80MHz_config   \
+TQM855L_FEC_config     \
+TQM855L_FEC_80MHz_config \
+TQM860L_config         \
+TQM860L_80MHz_config   \
+TQM860L_FEC_config     \
+TQM860L_FEC_80MHz_config:      unconfig
+       @echo "Configuring for $(call xtract,$@) Board..." ; \
        cd ./include ;                          \
        echo "ARCH  = ppc"      > config.mk ;   \
        echo "BOARD = tqm8xx"   >>config.mk ;   \
-       echo "CPU   = mpc8xx"   >>config.mk ;   \
-       echo "#include <config_$(@:_config=).h>" >config.h
+       echo "CPU   = mpc8xx"   >>config.mk
+       @echo "/* Automatically generated - do not edit */" >include/config.h
+       @[ -z "$(findstring _FEC,$@)" ] || \
+               { echo "#define CONFIG_FEC_ENET"        >>include/config.h ; \
+                 echo "... with FEC support" ; \
+               }
+       @[ -z "$(findstring _80MHz,$@)" ] || \
+               { echo "#define CONFIG_80MHz"           >>include/config.h ; \
+                 echo "... with 80MHz system clock" ; \
+               }
+       @[ -z "$(findstring _LCD,$@)" ] || \
+               { echo "#define CONFIG_LCD"             >>include/config.h ; \
+                 echo "... with LCD display" ; \
+               }
+       @echo "#include <config_$(call xtract,$@).h>"           >>include/config.h
 
 #########################################################################
 ## PPC4xx Systems

diff --git a/README b/README
index e6fd1c5475ee815f4f62814dfbe4cfa4d62b93ca..b1965972850eacf6b8fdfe59d8f56c8a7445bf73 100644 (file)
--- a/README
+++ b/README
@@ -390,6 +390,7 @@ The following options need to be configured:
                CFG_CMD_DATE    * support for RTC, date/time...
                CFG_CMD_DHCP      DHCP support
                CFG_CMD_BEDBUG    Include BedBug Debugger
+               CFG_CMD_ELF       bootelf, bootvx
                CFG_CMD_FDC       Floppy Disk Support
                CFG_CMD_SCSI      SCSI Support
                CFG_CMD_SETGETDCR Support for DCR Register access (4xx only)
@@ -786,6 +787,19 @@ Configuration Settings:
 - CFG_FLASH_WRITE_TOUT:
                Timeout for Flash write operations (in ms)
 
+- CFG_DIRECT_FLASH_TFTP:
+
+                Enable TFTP transfers directly to flash memory;
+                without this option such a download has to be
+                performed in two steps: (1) download to RAM, and (2)
+                copy from RAM to flash.
+
+                The two-step approach is usually more reliable, since
+                you can check if the download worked before you erase
+                the flash, but in some situations (when sytem RAM is
+                too limited to allow for a tempory copy of the
+                downloaded image) this option may be very useful.
+
 
 The following definitions that deal with the placement and management
 of environment data (variable area); in general, we support the
@@ -1059,6 +1073,27 @@ configurations; the following names are supported:
     FPS850L_config        Sandpoint8240_config  sbc8260_config
     GENIETV_config        TQM823L_config       PIP405_config
 
+Note: for some board spacial configuration names may exist; check  if
+      additional  information is available from the board vendor; for
+      instance, the TQM8xxL systems run normally at 50 MHz and use  a
+      SCC  for  10baseT  ethernet; there are also systems with 80 MHz
+      CPU clock, and an optional Fast Ethernet  module  is  available
+      for  CPU's  with FEC. You can select such additional "features"
+      when chosing the configuration, i. e.
+
+      make TQM860L_config
+       - will configure for a plain TQM860L, i. e. 50MHz, no FEC
+
+      make TQM860L_FEC_config
+       - will configure for a TQM860L at 50MHz with FEC for ethernet
+
+      make TQM860L_80MHz_config
+        - will configure for a TQM860L at 80 MHz, with normal 10baseT
+         interface
+
+      make TQM860L_FEC_80MHz_config
+        - will configure for a TQM860L at 80 MHz with FEC for ethernet
+
 Finally, type "make all", and you should  get  some  working  PPCBoot
 images ready for downlod to / installation on your system:
 
@@ -1088,6 +1123,32 @@ steps:
     [Of course, this last step is much harder than it sounds.]
 
 
+Testing of PPCBoot Modifications, Ports to New Hardware, etc.:
+==============================================================
+
+If you have modified PPCBoot sources (for instance added a new  board
+or  support  for  new  devices,  a new CPU, etc.) you are expected to
+provide feedback to the other developers. The feedback normally takes
+the form of a "patch", i. e. a context diff against a certain (latest
+official or latest in CVS) version of PPCBoot sources.
+
+But before you submit such a patch, please verify that  your  modifi-
+cation  did not break existing code. At least make sure that *ALL* of
+the supported boards compile WITHOUT ANY compiler warnings. To do so,
+just run the "MAKEALL" script, which will configure and build PPCBoot
+for ALL supported system. Be warned, this will take a while. You  can
+select  which  (cross)  compiler  to use py passing a `CROSS_COMPILE'
+environment variable to the script, i. e. to use the cross tools from
+MontaVista's Hard Hat Linux you can type
+
+       CROSS_COMPILE=ppc_8xx- MAKEALL
+
+or to build on a native PowerPC system you can type
+
+       CROSS_COMPILE=' ' MAKEALL
+
+
+
 
 Monitor Commands - Overview:
 ============================

diff --git a/board/cu824/flash.c b/board/cu824/flash.c
index 010a5fdbb39269d213dc6f1922c26fc59d7cb3ec..f90d8c74c9a997d47e343a49826dc6b0e46c2e70 100644 (file)
--- a/board/cu824/flash.c
+++ b/board/cu824/flash.c
@@ -282,8 +282,8 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
 
 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 {
-       ulong wp, msr;
-       int l, rc;
+       ulong wp, cp, msr;
+       int l, rc, i;
        unsigned char data[8];
        u_long *datah = (u_long *)&data[0];
        u_long *datal = (u_long *)&data[4];
@@ -292,47 +292,62 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
                return 4;
        }
 
+       msr = get_msr();
+       set_msr(msr | MSR_FP);
+
        wp = (addr & ~(FLASH_WIDTH-1)); /* get lower aligned address */
 
        /*
         * handle unaligned start bytes
         */
        if ((l = addr - wp) != 0) {
-#if 0
-               data = 0;
-               for (i=0, cp=wp; i<l; ++i, ++cp) {
-                       data = (data << 8) | (*(uchar *)cp);
+               *datah = *datal = 0;
+
+               for (i = 0, cp = wp; i < l; i++, cp++) {
+                       if (i >= 4) {
+                               *datah = (*datah << 8) |
+                                               ((*datal & 0xFF000000) >> 24);
+                       }
+
+                       *datal = (*datal << 8) | (*(u_char *)cp);
                }
-               for (; i<FLASH_WIDTH && cnt>0; ++i) {
-                       data = (data << 8) | *src++;
-                       --cnt;
-                       ++cp;
+               for (; i < FLASH_WIDTH && cnt > 0; ++i) {
+                       char tmp;
+
+                       tmp = *src;
+
+                       src++;
+
+                       if (i >= 4) {
+                               *datah = (*datah << 8) |
+                                               ((*datal & 0xFF000000) >> 24);
+                       }
+
+                       *datal = (*datal << 8) | tmp;
+
+                       --cnt; ++cp;
                }
-               for (; cnt==0 && i<FLASH_WIDTH; ++i, ++cp) {
-                       data = (data << 8) | (*(uchar *)cp);
+
+               for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) {
+                       if (i >= 4) {
+                               *datah = (*datah << 8) |
+                                               ((*datal & 0xFF000000) >> 24);
+                       }
+
+                       *datal = (*datah << 8) | (*(u_char *)cp);
                }
 
                if ((rc = write_data(info, wp, data)) != 0) {
+                       set_msr(msr);
                        return (rc);
                }
-               wp += FLASH_WIDTH;
-#else
-               return ERR_ALIGN;
-#endif
-       }
 
-#if 1
-       if (cnt % FLASH_WIDTH != 0)
-       {
-               return ERR_ALIGN;
+               wp += FLASH_WIDTH;
        }
-#endif
 
        /*
         * handle FLASH_WIDTH aligned part
         */
-       msr = get_msr();
-       set_msr(msr | MSR_FP);
        while (cnt >= FLASH_WIDTH) {
                *datah = *(u_long *)src;
                *datal = *(u_long *)(src + 4);
@@ -344,29 +359,43 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
                cnt -= FLASH_WIDTH;
                src += FLASH_WIDTH;
        }
-       set_msr(msr);
 
        if (cnt == 0) {
+               set_msr(msr);
                return (0);
        }
 
-#if 0
        /*
         * handle unaligned tail bytes
         */
-       data = 0;
-       for (i=0, cp=wp; i<FLASH_WIDTH && cnt>0; ++i, ++cp) {
-               data = (data << 8) | *src++;
+       *datah = *datal = 0;
+       for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
+               char tmp;
+
+               tmp = *src;
+
+               src++;
+
+               if (i >= 4) {
+                       *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
+               }
+
+               *datal = (*datal << 8) | tmp;
+
                --cnt;
        }
-       for (; i<FLASH_WIDTH; ++i, ++cp) {
-               data = (data << 8) | (*(uchar *)cp);
+
+       for (; i < FLASH_WIDTH; ++i, ++cp) {
+               if (i >= 4) {
+                       *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
+               }
+
+               *datal = (*datal << 8) | (*(u_char *)cp);
        }
 
-       return (write_data(info, wp, data));
-#else
-       return 0;
-#endif
+       rc = write_data(info, wp, data);
+       set_msr(msr);
+       return (rc);
 }
 
 /*-----------------------------------------------------------------------

diff --git a/board/esd/canbt/canbt.c b/board/esd/canbt/canbt.c
index 8ddee5b440fecbd28336040939eddd18b79dde07..c8c09fdc0eb712928e10b1d0a82a76d2a7685d3e 100644 (file)
--- a/board/esd/canbt/canbt.c
+++ b/board/esd/canbt/canbt.c
@@ -50,6 +50,7 @@ int board_pre_init (void)
 {
   unsigned long cntrl0Reg;
   int index, len, i;
+  int status;
 
   /*
    * Setup GPIO pins
@@ -62,20 +63,34 @@ int board_pre_init (void)
   /* set up serial port with default baudrate */
   serial_init(0, CONFIG_BAUDRATE);
   console_init_f();
-#endif 
+#endif
 
   /*
    * Boot onboard FPGA
    */
-  if (fpga_boot_compressed() != 0)
+  status = fpga_boot_compressed();
+  if (status != 0)
     {
       /* booting FPGA failed */
 #ifndef FPGA_DEBUG
       /* set up serial port with default baudrate */
       serial_init(0, CONFIG_BAUDRATE);
       console_init_f();
-#endif 
-      printf("\nFPGA: Booting failed!\n ");
+#endif
+      printf("\nFPGA: Booting failed ");
+      switch (status)
+        {
+        case ERROR_FPGA_PRG_INIT_LOW:
+          printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+          break;
+        case ERROR_FPGA_PRG_INIT_HIGH:
+          printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+          break;
+        case ERROR_FPGA_PRG_DONE:
+          printf("(Timeout: DONE not high after programming FPGA)\n ");
+          break;
+        }
+
       /* display infos on fpgaimage */
       index = 15;
       for (i=0; i<4; i++)
@@ -84,7 +99,7 @@ int board_pre_init (void)
          printf("FPGA: %s\n", &(fpgadata[index+1]));
          index += len+3;
        }
-      putc ('\n');  
+      putc ('\n');
       /* delayed reboot */
       for (i=20; i>0; i--)
        {
@@ -92,7 +107,7 @@ int board_pre_init (void)
          for (index=0;index<1000;index++)
            udelay(1000);
        }
-      putc ('\n');  
+      putc ('\n');
       do_reset(NULL, NULL, 0, 0, NULL);
     }
 

diff --git a/board/esd/canbt/fpgadata.c b/board/esd/canbt/fpgadata.c
index a6953b42c9bc1934a8032d986b173025894b5ecc..700b6995a0d0c7e28a674112ef96a0f53cf46623 100644 (file)
--- a/board/esd/canbt/fpgadata.c
+++ b/board/esd/canbt/fpgadata.c
@@ -1,407 +1,420 @@
- 0x00,0x09,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x00,0x00,0x01,0x61,0x00,0x09,
- 0x63,0x62,0x74,0x32,0x2e,0x6e,0x63,0x64,0x00,0x62,0x00,0x0b,0x73,0x30,0x35,0x78,
- 0x6c,0x76,0x71,0x31,0x30,0x30,0x00,0x63,0x00,0x0b,0x32,0x30,0x30,0x31,0x2f,0x30,
- 0x37,0x2f,0x30,0x36,0x00,0x64,0x00,0x09,0x31,0x36,0x3a,0x33,0x33,0x3a,0x34,0x35,
- 0x00,0x65,0xe2,0x01,0x00,0x00,0x19,0x21,0xff,0x30,0xe8,0x01,0x01,0x01,0x01,0xe7,
- 0xe6,0x04,0x01,0x0d,0x04,0x0b,0x09,0x09,0x01,0x07,0x0d,0x07,0x01,0x07,0x09,0x01,
- 0x07,0x07,0x01,0x01,0x0f,0x07,0x09,0x09,0x09,0x0b,0x07,0x01,0x09,0x09,0x03,0x05,
- 0x11,0x01,0xe5,0x1a,0xe5,0x07,0xe5,0x07,0xe5,0x08,0x0a,0x1e,0x18,0xe5,0x0e,0x04,
- 0x04,0x09,0x09,0x09,0x0b,0x06,0x02,0x09,0x09,0x09,0x0e,0xe6,0xe5,0x13,0x09,0x09,
- 0x09,0x09,0x0b,0xe6,0x06,0x09,0x09,0x09,0x0a,0xe5,0xe5,0x79,0x01,0xe6,0xe5,0x7b,
- 0x3f,0x3a,0x02,0xe5,0x1f,0x1e,0x0a,0x06,0x09,0x13,0x0b,0x02,0x7b,0xe7,0xe5,0x77,
- 0xe5,0xe6,0x3e,0x3a,0xe5,0x01,0x1f,0x1f,0x09,0x32,0x01,0x10,0x09,0x09,0x09,0x09,
- 0x0b,0x09,0x09,0x09,0x09,0x03,0x0a,0x01,0xe5,0x0f,0x09,0x04,0x04,0x09,0x09,0x0b,
- 0x04,0x04,0x09,0x09,0x09,0x0f,0xe6,0x0c,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,
- 0xe5,0x07,0x01,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x04,0x09,0x01,0x01,
- 0x08,0x07,0x04,0x04,0x09,0x09,0x09,0x06,0x04,0x09,0x09,0x09,0x09,0x0e,0xe7,0x05,
- 0x06,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x09,0xe5,0x07,0xe5,0x07,0xe5,
- 0x07,0xe5,0x07,0xe5,0x07,0x02,0x04,0x01,0xe5,0x0e,0x09,0x09,0x09,0x09,0x0b,0x09,
- 0x09,0x09,0x09,0x0f,0x01,0xe5,0x0c,0x07,0x01,0x09,0x09,0x09,0x09,0x01,0x09,0x09,
- 0x09,0x09,0x05,0xe5,0x08,0xe8,0x0c,0x02,0x06,0x02,0x06,0x02,0x06,0x02,0x03,0x02,
- 0x02,0x06,0x01,0x02,0x06,0x02,0x06,0x02,0x06,0x02,0x04,0x01,0x02,0x0d,0x01,0xe6,
- 0x02,0x63,0x04,0x02,0x0b,0x02,0x68,0x03,0x03,0x07,0x01,0xe6,0xe5,0x13,0x09,0x09,
- 0x13,0x2a,0x12,0xe5,0xe6,0x1e,0x09,0x13,0x02,0x1f,0x06,0x07,0xe5,0x0c,0x10,0x09,
- 0x09,0x09,0x09,0x0b,0x09,0x09,0x05,0x03,0x09,0x0e,0xe7,0x0c,0xe5,0xe5,0x6a,0x01,
- 0x75,0x05,0xe5,0xe5,0x0d,0x2e,0x15,0x24,0x01,0x01,0xe6,0x33,0x45,0x01,0xe6,0x64,
- 0x14,0x02,0xe5,0x0c,0x01,0x21,0x08,0x1d,0x23,0x01,0x0b,0x02,0xe5,0x28,0x2c,0x0a,
- 0x0c,0x7b,0x02,0x16,0x3a,0x28,0xe6,0xe5,0x3f,0x26,0x13,0xe5,0xe5,0x13,0x09,0x09,
- 0x13,0x20,0x02,0x1b,0xe6,0x2f,0x31,0x17,0x01,0x01,0x48,0x16,0x01,0x18,0x03,0x7a,
- 0xe5,0xe6,0x1c,0x09,0x09,0x08,0x16,0x0a,0x09,0x13,0x01,0xe6,0xe5,0x73,0x01,0x02,
- 0x01,0xe5,0x01,0x01,0x72,0xeb,0x03,0x5b,0x01,0x14,0x04,0xe6,0x01,0x59,0xe5,0x04,
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+ 0x01,0x10,0xe5,0x05,0x0b,0xe5,0x08,0x09,0x11,0x03,0x09,0x04,0x15,0x04,0xe7,0x07,
+ 0x02,0x05,0xe5,0x01,0x05,0x08,0x04,0x05,0x02,0x06,0x02,0xe5,0x05,0x02,0x01,0x05,
+ 0x02,0x09,0xe5,0x02,0x18,0x01,0xe5,0x01,0x02,0x03,0x02,0x05,0x01,0x01,0x05,0x01,
+ 0x01,0x06,0x01,0xe5,0x04,0x01,0x01,0x05,0xe5,0xe6,0x07,0x02,0x05,0x01,0x01,0x06,
+ 0x01,0xe6,0x01,0x02,0x02,0x0e,0x02,0x03,0xe5,0x0c,0x09,0x03,0x05,0x04,0xe5,0x02,
+ 0x03,0x05,0x0b,0x05,0x03,0x03,0x05,0x08,0x01,0x03,0xe5,0x11,0x03,0xe5,0x1c,0xe5,
+ 0x28,0xe6,0x06,0x01,0x0c,0x04,0x14,0x02,0xe5,0x0d,0x03,0x02,0x02,0x03,0xe5,0x03,
+ 0x03,0xe5,0x03,0x03,0xe5,0x03,0x03,0xe5,0x05,0x03,0x02,0x02,0x03,0xe5,0x03,0x03,
+ 0x02,0x03,0x02,0x01,0xe5,0x10,0x01,0xe6,0x13,0x10,0x02,0xe5,0x07,0xe5,0x07,0xe5,
+ 0x06,0x0c,0xe5,0x04,0x24,0xe5,0x0a,0x02,0x03,0x05,0x09,0x09,0x09,0x0b,0x04,0x01,
+ 0x02,0x09,0x06,0x02,0x04,0x01,0x02,0x0d,0x04,0x02,0x08,0xe5,0x08,0x09,0x13,0x09,
+ 0x0b,0x09,0x08,0xe5,0x17,0x05,0xe5,0x0a,0x03,0x05,0x03,0x04,0x04,0x09,0x04,0x04,
+ 0x04,0x06,0x05,0x03,0x04,0x04,0x05,0x1c,0xe5,0x01,0x61,0xe6,0x04,0x01,0x0c,0x01,
+ 0x01,0xe6,0x10,0x09,0x09,0x01,0x07,0x09,0x0b,0x01,0x07,0x09,0x01,0x03,0x0c,0x0d,
+ 0xe8,0x1d,0x3d,0x0c,0x01,0x09,0x04,0xe8,0x14,0xe5,0x07,0xe5,0x06,0xe6,0x05,0xe7,
+ 0x06,0xe6,0x07,0xe7,0x05,0xe7,0x05,0x01,0xe6,0xe6,0x03,0xe5,0x05,0x01,0xe5,0x06,
+ 0x03,0x1a,0xe5,0x03,0x03,0x05,0x09,0x03,0x05,0x05,0x05,0x03,0xe5,0x03,0x09,0x03,
+ 0xe5,0x03,0x09,0x07,0xe8,0x1f,0x03,0x05,0x08,0xe5,0x07,0xe5,0x04,0x04,0xe5,0x06,
+ 0xe6,0x07,0xe6,0xe5,0x04,0xe6,0xe5,0x04,0xe5,0x07,0x02,0xe5,0x0a,0x1b,0x08,0xe6,
+ 0x03,0x03,0xe5,0x01,0x06,0xe6,0x06,0x01,0x07,0x01,0x01,0x07,0x07,0x01,0x07,0x04,
+ 0x12,0x09,0x01,0x07,0x09,0xe6,0x06,0xe6,0x08,0xe5,0x05,0x01,0xe6,0x06,0xe6,0x03,
+ 0xe5,0x01,0xe5,0x01,0x01,0x03,0xe5,0x04,0x06,0xe5,0x0d,0x01,0x07,0x01,0x07,0x01,
+ 0x07,0x01,0x01,0x05,0x01,0x08,0x02,0x06,0x02,0x06,0x02,0x06,0x02,0x14,0x03,0x02,
+ 0x11,0x01,0x07,0x01,0xe6,0x04,0xe7,0x05,0x01,0x06,0xe7,0xe5,0x01,0x01,0x02,0xe6,
+ 0x03,0x02,0x01,0x04,0x02,0x01,0xe5,0xe5,0x03,0xe6,0x06,0x01,0xe6,0x09,0xe6,0x01,
+ 0x09,0x06,0x01,0x06,0x0c,0xe5,0x05,0x02,0x02,0xe5,0xe5,0x05,0x06,0x01,0xe5,0x04,
+ 0x03,0x01,0x07,0xe6,0x05,0x11,0xe5,0xe7,0x13,0xe5,0x08,0x05,0x0b,0x03,0xe5,0x11,
+ 0x07,0x21,0x04,0xe5,0xe5,0xe5,0x03,0x0f,0x01,0x0d,0x09,0xe5,0x0a,0xe5,0x01,0x0a,
+ 0x09,0x02,0x09,0x03,0x14,0xe8,0x07,0x04,0x01,0x07,0x01,0x02,0x01,0xe5,0xe5,0xe5,
+ 0x03,0xe5,0xe5,0xe6,0x05,0x01,0x05,0x03,0x01,0x07,0x01,0x02,0x01,0x02,0x01,0x09,
+ 0x07,0x02,0x0d,0xe8,0x01,0x08,0x02,0x01,0x04,0x02,0x01,0x05,0x01,0x01,0x07,0x01,
+ 0x03,0x01,0x01,0x01,0x06,0x01,0x02,0x06,0x02,0x02,0x01,0x01,0x02,0x04,0x0e,0x11,
+ 0x0e,0xe5,0x01,0x14,0x10,0x04,0x01,0x07,0x10,0x06,0x06,0x11,0x02,0xe7,0xe5,0x0a,
+ 0x0c,0x13,0x04,0x0b,0x1f,0x02,0x0d,0x0b,0x01,0x0a,0x02,0x04,0x01,0x07,0x15,0x06,
+ 0x02,0x02,0xe5,0x04,0x0c,0x05,0xe5,0xe5,0x03,0x1c,0x02,0x13,0xe6,0x06,0xe7,0x05,
+ 0xe7,0x05,0xe7,0x06,0x01,0xe5,0x04,0x2b,0x05,0xe8,0x0a,0x0e,0x08,0x03,0x04,0x0b,
+ 0x04,0xe8,0x01,0x22,0x05,0x03,0xe5,0x01,0xe5,0x02,0xe6,0xe5,0x15,0x01,0x04,0x08,
+ 0x01,0x01,0x04,0x03,0x06,0x06,0x01,0x03,0x09,0x0c,0x04,0x16,0xe9,0x07,0x14,0x08,
+ 0x15,0x05,0xe7,0x08,0x08,0xe6,0x04,0x17,0xe5,0x02,0x28,0x1a,0x15,0x07,0x18,0x01,
+ 0x01,0xe6,0x17,0xe5,0x01,0xe5,0xe5,0x01,0xe8,0x06,0x07,0x0b,0xe6,0x10,0xe5,0x1d,
+ 0xe5,0xe5,0x01,0x02,0x01,0x15,0x03,0xe5,0xe5,0x03,0x13,0x09,0x14,0x1b,0x01,0x02,
+ 0xe8,0x03,0x0d,0x0e,0x03,0x05,0x01,0x07,0x01,0x03,0xe5,0x03,0x01,0x04,0x01,0xe5,
+ 0xe5,0x01,0x04,0x01,0x04,0xe5,0x02,0x02,0x10,0x04,0xe5,0x01,0x21,0x06,0x02,0x01,
+ 0x04,0xe5,0xe5,0xe5,0x08,0x01,0x07,0x01,0x04,0xe5,0xe5,0xe5,0x08,0x15,0x02,0x01,
+ 0x01,0x0d,0x01,0x11,0x07,0x06,0x4a,0xe7,0x0c,0x01,0x01,0x0f,0x03,0x09,0x09,0x0b,
+ 0x09,0x09,0x09,0x10,0x02,0x02,0x02,0xe5,0x0c,0x01,0x04,0x07,0x04,0x09,0x01,0x03,
+ 0xe5,0x01,0x01,0x04,0x04,0x01,0x07,0x01,0x07,0x01,0x04,0x01,0x1a,0x04,0x0d,0x01,
+ 0x03,0xe6,0x0a,0x09,0x01,0x01,0xe5,0x03,0x01,0x04,0xe5,0x02,0x01,0x04,0x01,0xe5,
+ 0xe5,0x06,0x01,0x04,0x1e,0xe5,0xe5,0x2d,0x01,0xe5,0x08,0x01,0xe5,0x11,0x02,0x08,
+ 0x1c,0x01,0xe6,0x2d,0xe5,0x03,0x07,0xe5,0x3b,0x03,0xe5,0x0d,0x02,0x06,0x09,0x09,
+ 0xe5,0x07,0x0b,0x09,0x09,0x06,0x02,0x09,0x0d,0x02,0xe6,0x01,0x2c,0xe5,0x2b,0xe5,
+ 0x17,0x02,0x01,0xe6,0x2e,0x2b,0x1e,0x02,0xe5,0xe5,0x27,0xe5,0xe6,0xe5,0x02,0xe5,
+ 0xe5,0x0a,0x07,0x01,0x11,0x01,0x18,0x01,0x01,0x0a,0x09,0x09,0x05,0x06,0x01,0xe6,
+ 0x04,0x01,0xe5,0x09,0xe5,0x05,0x01,0xe5,0x02,0x0c,0x01,0xe5,0x0e,0x07,0x01,0x01,
+ 0x0a,0x31,0x06,0x1b,0x01,0x17,0xe6,0xe6,0x13,0xe6,0x07,0xe5,0x07,0xe5,0x05,0xe7,
+ 0x07,0xe5,0x03,0x04,0xe6,0x07,0xe5,0x07,0xe6,0xe5,0x04,0xe5,0x05,0x01,0xe5,0x05,
+ 0x02,0xe6,0x0f,0xe5,0x03,0x03,0xe5,0x04,0x01,0xe5,0x05,0x01,0x07,0x01,0xe5,0x09,
+ 0xe6,0x01,0x02,0x01,0x0a,0xe5,0x06,0x19,0x02,0x20,0xe5,0xe6,0x05,0x01,0x03,0x02,
+ 0xe5,0xe6,0x09,0x06,0xe5,0xe5,0x0f,0xe5,0xe5,0x17,0x01,0xe6,0x13,0x0c,0x01,0x0e,
+ 0xe5,0x0b,0x02,0x05,0x09,0x0d,0x0d,0x01,0x09,0xe7,0x0f,0x03,0x05,0x03,0x01,0xe5,
+ 0xe6,0x0a,0xe5,0xe6,0x02,0x0a,0xe5,0x01,0xe7,0x07,0x04,0x05,0xe5,0xe5,0x0c,0x01,
+ 0x09,0x01,0xe5,0x20,0x02,0x14,0x0b,0x0c,0x26,0x02,0xe6,0x0f,0xe5,0xe5,0x06,0xe6,
+ 0x03,0x02,0x01,0x07,0x01,0x07,0xe6,0x03,0x04,0x01,0x07,0x01,0xe5,0x04,0xe5,0xe6,
+ 0x05,0xe6,0x06,0x01,0x0b,0x02,0x02,0x0f,0x03,0x04,0x03,0x01,0x05,0x02,0x02,0x03,
+ 0x02,0x04,0x03,0x19,0x02,0x0b,0x10,0x03,0xe5,0xe6,0x03,0x22,0x27,0x12,0x15,0x02,
+ 0xe6,0x28,0x03,0x0d,0x03,0x16,0x0d,0x17,0x01,0xe5,0x06,0x11,0x06,0x01,0x0a,0x02,
+ 0x0e,0x03,0x0d,0x07,0x02,0x01,0x01,0x1a,0x01,0x24,0x02,0x02,0x14,0x19,0x05,0x01,
+ 0x03,0x15,0xe8,0x1f,0x0f,0x0a,0x02,0x0a,0x02,0x08,0xe5,0x22,0x02,0x1a,0x04,0x06,
+ 0x07,0x09,0x06,0x04,0x0b,0x04,0x10,0x01,0x13,0xe6,0x14,0x0f,0x14,0x04,0x0e,0x06,
+ 0x06,0x01,0x11,0x09,0xe5,0x01,0x09,0x27,0x0d,0xe5,0x12,0x11,0x0b,0x09,0x01,0x25,
+ 0x03,0x15,0x08,0x06,0x28,0x01,0xe5,0x01,0xe5,0x07,0x09,0x02,0x06,0x09,0x03,0x01,
+ 0xe5,0x0e,0x12,0x0c,0x1b,0xe6,0xe5,0x2d,0x20,0x0d,0x1b,0x03,0xe5,0x2f,0x34,0x16,
+ 0x01,0x03,0x0b,0xe5,0x03,0x03,0xe5,0x07,0xe5,0x07,0xe5,0xe5,0x05,0xe5,0xe5,0x02,
+ 0x04,0xe5,0x07,0xe5,0x07,0xe5,0x03,0x03,0xe5,0x07,0xe5,0x0b,0x01,0xe7,0x0f,0x05,
+ 0x03,0x02,0x06,0xe5,0x03,0x03,0x09,0x0b,0x05,0x03,0x08,0xe5,0x08,0x04,0x03,0xe5,
+ 0x0e,0x01,0x0f,0x09,0x06,0x02,0x05,0x03,0x04,0x01,0x02,0x04,0x06,0x09,0x04,0x04,
+ 0x09,0x09,0x10,0x01,0x12,0x13,0x02,0x0a,0x0b,0x0f,0x06,0x0b,0xe5,0x15,0xe5,0xe5,
+ 0x0e,0x09,0x09,0x09,0x03,0x05,0x08,0x02,0x09,0x09,0x09,0x09,0xe5,0x0c,0x02,0xe5,
+ 0x0c,0xe5,0x07,0xe5,0x07,0xe5,0x05,0xe7,0x07,0xe5,0x09,0xe5,0x07,0xe5,0x06,0xe6,
+ 0x07,0xe5,0x07,0xe5,0x0f,0xe5,0xe5,0x02,0x09,0x03,0xe5,0x03,0x09,0x09,0x06,0x02,
+ 0x03,0x07,0x08,0xe5,0x08,0x08,0xe5,0x06,0x01,0x08,0x08,0xe7,0x0d,0xe5,0xe5,0x05,
+ 0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x07,0xe5,0xe5,0x05,0xe5,
+ 0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x0b,0xe5,0xe6,0x0d,0x09,0x03,
+ 0x05,0x09,0x02,0x06,0x0b,0x03,0x05,0x09,0x02,0x02,0x03,0x09,0x05,0x0c,0xe5,0x06,
+ 0x2c,0x25,0x20,0x01,0xe5,0x07,0x05,0x09,0x02,0x06,0x01,0x05,0x01,0x01,0x02,0xe5,
+ 0x02,0x02,0xe5,0x03,0x02,0x09,0x05,0x03,0x09,0x09,0x10,0xe5,0xe5,0x07,0x16,0x1f,
+ 0x09,0xe5,0x04,0x2d,0x07,0x08,0x01,0x07,0x04,0x04,0x09,0x03,0x05,0x0b,0xe5,0x07,
+ 0x09,0x09,0x09,0x0d,0xe8,0x1e,0x0a,0x1e,0x30,0x01,0xe6,0x3c,0x01,0x09,0x20,0x10,
+ 0xe5,0xe5,0x09,0xe5,0x31,0xe5,0x13,0x14,0xe5,0x0a,0x03,0x01,0x01,0x7c,0xe6,0x12,
+ 0x35,0xe5,0x2e,0xe8,0x3c,0x01,0x33,0x06,0xe8,0x04,0x39,0x34,0x09,0x05,0x74,0xe5,
+ 0x01,0x14,0x09,0x09,0x09,0x09,0x0b,0x09,0x09,0x09,0x09,0x0a,0x01,0xe5,0x04,0x09,
+ 0x09,0x09,0x08,0xe5,0x08,0x07,0x03,0x09,0x09,0x09,0x08,0xe5,0x10,0xe5,0x3e,0x14,
+ 0x0f,0x15,0xe6,0xe5,0x0c,0x09,0x09,0x0d,0x05,0x0b,0x09,0x03,0x03,0x01,0x07,0x01,
+ 0x1b,0xe5,0xe5,0x0a,0x02,0x07,0x04,0xe5,0x02,0x01,0x03,0x03,0xe5,0xe5,0x01,0x03,
+ 0x04,0xe5,0x02,0x06,0xe5,0x02,0x05,0x01,0x06,0x02,0x06,0x04,0x02,0x06,0xe6,0xe8,
+ 0xe6,0xe5,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+ 0xff,0xff,0xff,0xff,0xff,

diff --git a/board/esd/common/fpga.c b/board/esd/common/fpga.c
index 631cd4a4a7ef740dc8794cfc1fae434bb90b5c80..995100f7f14553a008ea192b11ba44ba4463bb71 100644 (file)
--- a/board/esd/common/fpga.c
+++ b/board/esd/common/fpga.c
@@ -35,22 +35,30 @@
 #define IBM405GP_GPIO0_ODR     0xef600718  /* GPIO Open Drain */
 #define IBM405GP_GPIO0_IR      0xef60071c  /* GPIO Input */
 
+#define FPGA_PRG               0x04000000  /* FPGA program pin (ppc output) */
+#define FPGA_CLK               0x02000000  /* FPGA clk pin (ppc output)     */
+#define FPGA_DATA              0x01000000  /* FPGA data pin (ppc output)    */
+#define FPGA_DONE              0x00800000  /* FPGA done pin (ppc input)     */
+#define FPGA_INIT              0x00400000  /* FPGA init pin (pcc input)     */
 
-void write_1(void)
-{
-  out32(IBM405GP_GPIO0_OR, 0x05000000);  /* set clock to 0 */
-  out32(IBM405GP_GPIO0_OR, 0x05000000);  /* set data to 1 */
-  out32(IBM405GP_GPIO0_OR, 0x07000000);  /* set clock to 1 */
-  out32(IBM405GP_GPIO0_OR, 0x07000000);  /* set data to 1 */
-}
+#define ERROR_FPGA_PRG_INIT_LOW  -1        /* Timeout after PRG* asserted   */
+#define ERROR_FPGA_PRG_INIT_HIGH -2        /* Timeout after PRG* deasserted */
+#define ERROR_FPGA_PRG_DONE      -3        /* Timeout after programming     */
+
+#define SET_FPGA(data)         out32(IBM405GP_GPIO0_OR, data)
+
+#define FPGA_WRITE_1 {                                                    \
+        SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set clock to 0 */  \
+        SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set data to 1  */  \
+        SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);  /* set clock to 1 */  \
+        SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1  */
+
+#define FPGA_WRITE_0 {                                                    \
+        SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set clock to 0 */  \
+        SET_FPGA(FPGA_PRG);                         /* set data to 0  */  \
+        SET_FPGA(FPGA_PRG | FPGA_CLK);              /* set clock to 1 */  \
+        SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1  */
 
-void write_0(void)
-{
-  out32(IBM405GP_GPIO0_OR, 0x05000000);  /* set clock to 0 */
-  out32(IBM405GP_GPIO0_OR, 0x04000000);  /* set data to 0 */
-  out32(IBM405GP_GPIO0_OR, 0x06000000);  /* set clock to 1 */
-  out32(IBM405GP_GPIO0_OR, 0x07000000);  /* set data to 1 */
-}
 
 static int fpga_boot_compressed(void)
 {
@@ -58,6 +66,7 @@ static int fpga_boot_compressed(void)
   unsigned char b;
   int size = sizeof(fpgadata);
   int bit;
+  int start;
 
   /* display infos on fpgaimage */
   index = 15;
@@ -86,26 +95,57 @@ static int fpga_boot_compressed(void)
   /*
    * Setup port pins for fpga programming
    */
-  out32(IBM405GP_GPIO0_ODR, 0x00000000);  /* no open drain pins */
-  out32(IBM405GP_GPIO0_TCR, 0x07000000);  /* setup for output */
-  out32(IBM405GP_GPIO0_OR, 0x07000000);   /* set output pins to high (default) */
+  out32(IBM405GP_GPIO0_ODR, 0x00000000);                       /* no open drain pins      */
+  out32(IBM405GP_GPIO0_TCR, FPGA_PRG | FPGA_CLK | FPGA_DATA);  /* setup for output        */
+  out32(IBM405GP_GPIO0_OR,  FPGA_PRG | FPGA_CLK | FPGA_DATA);  /* set output pins to high */
 
 #ifdef FPGA_DEBUG
-  printf("%s\n",((in32(IBM405GP_GPIO0_IR) & 0x00800000) == 0) ? "NOT DONE" : "DONE" );
+  printf("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
 #endif
 
   /*
    * Init fpga by asserting and deasserting PROGRAM*
    */
-  out32(IBM405GP_GPIO0_OR, 0x03000000);
-  udelay(FPGA_PRG_SLEEP*1000);
+  SET_FPGA(FPGA_CLK | FPGA_DATA);
+
+  /* Setup timeout timer */
+  start = get_timer(0);
+
+  /* Wait for FPGA init line low */
+  while (in32(IBM405GP_GPIO0_IR) & FPGA_INIT)
+    {
+      /* Check for timeout - 100us max, so use 3ms */
+      if (get_timer(start) > 3)
+        {
+#ifdef FPGA_DEBUG
+          printf("FPGA: Booting failed!\n");
+#endif
+          return ERROR_FPGA_PRG_INIT_LOW;
+        }
+    }
+
 #ifdef FPGA_DEBUG
-  printf("%s\n",((in32(IBM405GP_GPIO0_IR) & 0x00800000) == 0) ? "NOT DONE" : "DONE" );
+  printf("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
 #endif
-  out32(IBM405GP_GPIO0_OR, 0x07000000);
-  udelay(FPGA_PRG_SLEEP*1000);
+
+  /* deassert PROGRAM* */
+  SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+
+  /* Wait for FPGA end of init period .  */
+  while (!(in32(IBM405GP_GPIO0_IR) & FPGA_INIT))
+    {
+      /* Check for timeout */
+      if (get_timer(start) > 3)
+        {
 #ifdef FPGA_DEBUG
-  printf("%s\n",((in32(IBM405GP_GPIO0_IR) & 0x00800000) == 0) ? "NOT DONE" : "DONE" );
+          printf("FPGA: Booting failed!\n");
+#endif
+          return ERROR_FPGA_PRG_INIT_HIGH;
+        }
+    }
+
+#ifdef FPGA_DEBUG
+  printf("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
 #endif
 
 #ifdef FPGA_DEBUG
@@ -114,8 +154,10 @@ static int fpga_boot_compressed(void)
   /* write configuration-data into fpga... */
 
   /* send 0xff 0x20 */
-  write_1();  write_1();  write_1();  write_1();  write_1();  write_1();  write_1();  write_1();
-  write_0();  write_0();  write_1();  write_0();  write_0();  write_0();  write_0();  write_0();
+  FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1;
+  FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1;
+  FPGA_WRITE_0; FPGA_WRITE_0; FPGA_WRITE_1; FPGA_WRITE_0;
+  FPGA_WRITE_0; FPGA_WRITE_0; FPGA_WRITE_0; FPGA_WRITE_0;
 
   /*
   ** Bit_DeCompression
@@ -131,43 +173,58 @@ static int fpga_boot_compressed(void)
       if ((b >= 1) && (b <= MAX_ONES))
        {
          for(bit=0; bit<b; bit++)
-           write_1();
-         write_0();
+            {
+              FPGA_WRITE_1;
+            }
+         FPGA_WRITE_0;
        }
       else if (b == (MAX_ONES+1))
        {
          for(bit=1; bit<b; bit++)
-           write_1();
+            {
+              FPGA_WRITE_1;
+            }
        }
       else if ((b >= (MAX_ONES+2)) && (b <= 254))
        {
          for(bit=0; bit<(b-(MAX_ONES+2)); bit++)
-           write_0();    
-         write_1();
+            {
+              FPGA_WRITE_0;
+            }
+          FPGA_WRITE_1;
        }
       else if (b == 255)
-       write_1();
+        {
+          FPGA_WRITE_1;
+        }
     }
-  udelay(FPGA_PRG_SLEEP*1000);
+
 #ifdef FPGA_DEBUG
-  printf("%s\n",((in32(IBM405GP_GPIO0_IR) & 0x00800000) == 0) ? "NOT DONE" : "DONE" );
+  printf("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
 #endif
 
   /*
    * Check if fpga's DONE signal - correctly booted ?
    */
-  if ((in32(IBM405GP_GPIO0_IR) & 0x00800000) == 0)
+
+  /* Setup timer */
+  start = get_timer(0);
+  
+  /* Wait for FPGA end of programming period .  */
+  while (!(in32(IBM405GP_GPIO0_IR) & FPGA_DONE))
     {
+      /* Check for timeout */
+      if (get_timer(start) > 3)
+        {
 #ifdef FPGA_DEBUG
-      printf("FPGA: Booting failed!\n");
+          printf("FPGA: Booting failed!\n");
 #endif
-      return -1;
+          return ERROR_FPGA_PRG_DONE;
+        }
     }
-  else
-    {
+
 #ifdef FPGA_DEBUG
-      printf("FPGA: Booting successful!\n");
+  printf("FPGA: Booting successful!\n");
 #endif
-      return 0;
-    }
+  return 0;
 }

diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c
index 4c76a507d164ee1762997df949d34c84509e86ee..b6619cf6745b3e5ba3a1b801d55ea50f151f6a5e 100644 (file)
--- a/board/esd/cpci405/cpci405.c
+++ b/board/esd/cpci405/cpci405.c
@@ -49,6 +49,7 @@ const unsigned char fpgadata[] =
 int board_pre_init (void)
 {
   int index, len, i;
+  int status;
 
 #ifdef FPGA_DEBUG
   /* set up serial port with default baudrate */
@@ -59,7 +60,8 @@ int board_pre_init (void)
   /*
    * Boot onboard FPGA
    */
-  if (fpga_boot_compressed() != 0)
+  status = fpga_boot_compressed();
+  if (status != 0)
     {
       /* booting FPGA failed */
 #ifndef FPGA_DEBUG
@@ -67,7 +69,20 @@ int board_pre_init (void)
       serial_init(0, CONFIG_BAUDRATE);
       console_init_f();
 #endif 
-      printf("\nFPGA: Booting failed!\n ");
+      printf("\nFPGA: Booting failed ");
+      switch (status)
+        {
+        case ERROR_FPGA_PRG_INIT_LOW:
+          printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+          break;
+        case ERROR_FPGA_PRG_INIT_HIGH:
+          printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+          break;
+        case ERROR_FPGA_PRG_DONE:
+          printf("(Timeout: DONE not high after programming FPGA)\n ");
+          break;
+        }
+
       /* display infos on fpgaimage */
       index = 15;
       for (i=0; i<4; i++)

diff --git a/board/esd/cpci405/init.S b/board/esd/cpci405/init.S
index 2e6d0b759a0fe35d175db14127f947d78e385c02..4f176f8b5abfc68b63167f2d2acfe0f6b0342377 100644 (file)
--- a/board/esd/cpci405/init.S
+++ b/board/esd/cpci405/init.S
@@ -62,125 +62,6 @@
 #include <asm/mmu.h>
 
 
-       .globl  ext_bus_cntlr_init
-ext_bus_cntlr_init:
-        mflr    r4                      // save link register
-        bl      ..getAddr
-..getAddr:
-        mflr    r3                      // get address of ..getAddr
-        mtlr    r4                      // restore link register
-        addi    r4,0,14                 // set ctr to 10; used to prefetch
-        mtctr   r4                      // 10 cache lines to fit this function
-                                        // in cache (gives us 8x10=80 instrctns)
-..ebcloop:
-        icbt    r0,r3                   // prefetch cache line for addr in r3
-        addi    r3,r3,32               // move to next cache line
-        bdnz    ..ebcloop               // continue for 10 cache lines
-
-        //-------------------------------------------------------------------
-        // Delay to ensure all accesses to ROM are complete before changing
-       // bank 0 timings. 200usec should be enough.
-        //   200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles
-        //-------------------------------------------------------------------
-       addis   r3,0,0x0
-        ori     r3,r3,0xA000          // ensure 200usec have passed since reset
-        mtctr   r3
-..spinlp:
-        bdnz    ..spinlp                // spin loop
-
-        //-----------------------------------------------------------------------
-        // Memory Bank 0 (Flash Bank 0) initialization
-        //-----------------------------------------------------------------------
-        addi    r4,0,pb0ap
-        mtdcr   ebccfga,r4
-        addis   r4,0,0x9201
-        ori     r4,r4,0x5480
-        mtdcr   ebccfgd,r4
-
-        addi    r4,0,pb0cr
-        mtdcr   ebccfga,r4
-        addis   r4,0,0xFFC5           // BAS=0xFFC,BS=0x2(4MB),BU=0x3(R/W),
-        ori     r4,r4,0xA000          // BW=0x1(16 bits)
-        mtdcr   ebccfgd,r4
-
-        //-----------------------------------------------------------------------
-        // Memory Bank 1 (Flash Bank 1) initialization
-        //-----------------------------------------------------------------------
-        addi    r4,0,pb1ap
-        mtdcr   ebccfga,r4
-        addis   r4,0,0x9201
-        ori     r4,r4,0x5480
-        mtdcr   ebccfgd,r4
-
-        addi    r4,0,pb1cr
-        mtdcr   ebccfga,r4
-        addis   r4,0,0xFF85           // BAS=0xFF8,BS=0x2(4MB),BU=0x3(R/W),
-        ori     r4,r4,0xA000          // BW=0x1(16 bits)
-        mtdcr   ebccfgd,r4
-
-        //-----------------------------------------------------------------------
-        // Memory Bank 2 (CAN0, 1, 2, Codeswitch) initialization
-        //-----------------------------------------------------------------------
-        addi    r4,0,pb2ap
-        mtdcr   ebccfga,r4
-        addis   r4,0,0x0100
-        ori     r4,r4,0x53c0          // enable Ready, BEM=1
-        mtdcr   ebccfgd,r4
-
-        addi    r4,0,pb2cr
-        mtdcr   ebccfga,r4
-        addis   r4,0,0xF001            // BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W),
-        ori     r4,r4,0x8000            // BW=0x0(8 bits)
-        mtdcr   ebccfgd,r4
-
-        //-----------------------------------------------------------------------
-        // Memory Bank 3 (CompactFlash IDE) initialization
-        //-----------------------------------------------------------------------
-        addi    r4,0,pb3ap
-        mtdcr   ebccfga,r4
-        addis   r4,0,0x0100
-        ori     r4,r4,0x53c0          // enable Ready, BEM=1
-        mtdcr   ebccfgd,r4
-
-        addi    r4,0,pb3cr
-        mtdcr   ebccfga,r4
-        addis   r4,0,0xF011           // BAS=0xF01,BS=0x0(1MB),BU=0x3(R/W),
-        ori     r4,r4,0xA000          // BW=0x1(16 bits)
-        mtdcr   ebccfgd,r4
-
-        //-----------------------------------------------------------------------
-        // Memory Bank 4 (NVRAM) initialization
-        //-----------------------------------------------------------------------
-        addi    r4,0,pb4ap
-        mtdcr   ebccfga,r4
-        addis   r4,0,0x0100
-        ori     r4,r4,0x5280          // disable Ready, BEM=0
-        mtdcr   ebccfgd,r4
-
-        addi    r4,0,pb4cr
-        mtdcr   ebccfga,r4
-        addis   r4,0,0xF021            // BAS=0xF02,BS=0x0(1MB),BU=0x3(R/W),
-        ori     r4,r4,0x8000            // BW=0x0(8 bits)
-        mtdcr   ebccfgd,r4
-
-        //-----------------------------------------------------------------------
-        // Memory Bank 5 (Quart) initialization
-        //-----------------------------------------------------------------------
-        addi    r4,0,pb5ap
-        mtdcr   ebccfga,r4
-        addis   r4,0,0x0400
-        ori     r4,r4,0x5b80          // enable Ready, BEM=0
-        mtdcr   ebccfgd,r4
-
-        addi    r4,0,pb5cr
-        mtdcr   ebccfga,r4
-        addis   r4,0,0xF031            // BAS=0xF03,BS=0x0(1MB),BU=0x3(R/W),
-        ori     r4,r4,0x8000            // BW=0x0(8 bits)
-        mtdcr   ebccfgd,r4
-
-       nop                             // pass2 DCR errata #8
-        blr
-
 //-----------------------------------------------------------------------------
 // Function:     sdram_init
 // Description:  Configures SDRAM memory banks.

diff --git a/common/Makefile b/common/Makefile
index 10d77fab8a3197aab5e106592fb081157f1fb3e8..480a35c08e89484987afaafa7563a25dca7fdb01 100644 (file)
--- a/common/Makefile
+++ b/common/Makefile
@@ -29,7 +29,7 @@ AOBJS = environment.o
 COBJS  = board.o main.o command.o bedbug.o \
          cmd_autoscript.o cmd_bedbug.o cmd_boot.o \
          cmd_bootm.o cmd_cache.o cmd_console.o \
-         cmd_date.o cmd_dcr.o cmd_eeprom.o \
+         cmd_date.o cmd_dcr.o cmd_eeprom.o cmd_elf.o \
          cmd_fdc.o cmd_flash.o cmd_i2c.o \
          cmd_ide.o cmd_immap.o cmd_mem.o \
          cmd_mii.o cmd_net.o cmd_nvedit.o \

diff --git a/common/board.c b/common/board.c
index c318b73011ed82b81092f499b3d1b273f9274363..4aa73b31b7cc8307a205558ae6d631102e91c6ff 100644 (file)
--- a/common/board.c
+++ b/common/board.c
@@ -680,13 +680,14 @@ void    board_init_r  (bd_t *bd, ulong dest_addr)
     console_init_r (reloc_off);
 /** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** **/
 
-#if defined(CONFIG_COGENT)     || \
+#if defined(CONFIG_CCM)                || \
+    defined(CONFIG_COGENT)     || \
     defined(CONFIG_CPCI405)    || \
     defined(CONFIG_EVB64260)   || \
     defined(CONFIG_HYMOD)      || \
     defined(CONFIG_LWMON)      || \
-    defined(CONFIG_PCU_E) || \
-    defined(CONFIG_W7O) || \
+    defined(CONFIG_PCU_E)      || \
+    defined(CONFIG_W7O)                || \
     defined(CONFIG_MISC_INIT_R)
     /* miscellaneous platform dependent initialisations */
     misc_init_r(bd);

diff --git a/common/cmd_bedbug.c b/common/cmd_bedbug.c
index 9c6a610115dad7633c0eeaf19362d8d2cfd3e227..26124537b35a067b8c325a6b162360e66def3349 100644 (file)
--- a/common/cmd_bedbug.c
+++ b/common/cmd_bedbug.c
@@ -410,263 +410,6 @@ int do_bedbug_rdump (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc,
 } /* do_bedbug_rdump */
 
 
-\f
-/* ======================================================================
- * Interpreter command to boot an arbitrary ELF image from memory.
- * ====================================================================== */
-int do_bootelf( cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[] )
-{
-  unsigned long        addr;   /* Address of the ELF image     */
-  unsigned long        rc;     /* Return value from user code  */
-  /* -------------------------------------------------- */
-  int rcode = 0;
-
-  if (argc < 2)
-    addr = load_addr;
-  else
-    addr = simple_strtoul( argv[ 1 ], NULL, 16 );
-
-  if( ! valid_elf_image( addr ))
-    return 1;
-  
-  addr = load_elf_image( addr );
-
-  printf ("## Starting application at 0x%08lx ...\n", addr);
-
-  /*
-   * pass address parameter as argv[0] (aka command name),
-   * and all remaining args
-   */
-  rc = ((ulong (*)(bd_t *, int, char *[]))addr) (bd, --argc, &argv[1]);
-  if (rc != 0) rcode = 1;
-
-  printf ("## Application terminated, rc = 0x%lx\n", rc);
-  return rcode;
-} /* do_bootelf */
-
-
-\f
-/* ======================================================================
- * Interpreter command to boot VxWorks from a memory image.  The image can
- * be either an ELF image or a raw binary.  Will attempt to setup the
- * bootline and other parameters correctly.
- * ====================================================================== */
-int do_bootvx( cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[] )
-{
-  unsigned long        addr;                   /* Address of image            */
-  unsigned long        bootaddr;               /* Address to put the bootline */
-  char *       bootline;               /* Text of the bootline        */
-  char *       tmp;                    /* Temporary char pointer      */
-#if defined(CONFIG_4xx) || defined(CONFIG_IOP480)
-  char          build_buf[ 80 ];        /* Buffer for building the bootline */
-#endif
-  /* -------------------------------------------------- */
-
-  /* Check the loadaddr variable.  If we don't know where the image is
-     then we're done. */
-  
-  if(( tmp = getenv( "loadaddr" )) != NULL )
-  {
-    addr = simple_strtoul( tmp, NULL, 16 );
-  }
-  else
-  {
-    printf( "No load address provided\n" );
-    return 1;
-  }
-
-  /* Check to see if we need to tftp the image ourselves before starting */
-  
-  if(( argc == 2 ) && ( strcmp( argv[ 1 ], "tftp" ) == 0 ))
-  {
-    if( NetLoop( bd, TFTP ) == 0 )
-      return 1;
-    printf( "Automatic boot of VxWorks image at address 0x%08lx ... \n",
-            addr );
-  }
-
-  /* This should equate to NV_RAM_ADRS + NV_BOOT_OFFSET + NV_ENET_OFFSET
-     from the VxWorks BSP header files.  This will vary from board to board */
-
-#if defined(CONFIG_WALNUT405)
-  tmp = (char *)CFG_NVRAM_BASE_ADDR + 0x500;
-  memcpy( (char *)tmp, (char *)&bd->bi_enetaddr[3], 3 );
-#elif defined(CONFIG_CPCI405)
-  tmp = (char *)CFG_NVRAM_BASE_ADDR + CFG_NVRAM_VXWORKS_OFFS;
-  memcpy( (char *)tmp, (char *)&bd->bi_enetaddr[0], 6 );
-#elif defined(CONFIG_OCRTC)
-  tmp = (char *)CFG_ETHERNET_MAC_ADDR;
-  memcpy( (char *)tmp, (char *)&bd->bi_enetaddr[0], 6 );
-#else
-  printf( "## Ethernet MAC address not copied to NV RAM\n" );
-#endif
-  
-  /* Use bootaddr to find the location in memory that VxWorks will
-     look for the bootline string.  The default value for PowerPC
-     is LOCAL_MEM_LOCAL_ADRS + BOOT_LINE_OFFSET which defaults
-     to 0x4200 */
-  
-  if(( tmp = getenv( "bootaddr" )) == NULL )
-    bootaddr = 0x4200;
-  else
-    bootaddr = simple_strtoul( tmp, NULL, 16 );
-
-  /* Check to see if the bootline is defined in the 'bootargs' parameter.
-     If it is not defined, we may be able to construct the info */
-  
-  if(( bootline = getenv( "bootargs" )) != NULL )
-  {
-    memcpy( (void *)bootaddr, bootline, MAX( strlen( bootline ), 255 ));
-  }
-  else
-  {
-#if defined(CONFIG_4xx)
-    sprintf( build_buf, "ibmEmac(0,0)" );
-
-    if(( tmp = getenv( "hostname" )) != NULL )
-    {
-      sprintf( &build_buf[ strlen( build_buf - 1 ) ], "host:%s ", tmp );
-    }
-    else
-    {
-      sprintf( &build_buf[ strlen( build_buf - 1 ) ], ": " );
-    }
-
-    if(( tmp = getenv( "ipaddr" )) != NULL )
-    {
-      sprintf( &build_buf[ strlen( build_buf - 1 ) ], "e=%s ", tmp );
-    }
-    memcpy( (void *)bootaddr, build_buf, MAX( strlen( build_buf ), 255 ));
-#elif defined(CONFIG_IOP480)
-    sprintf( build_buf, "dc(0,0)" );
-
-    if(( tmp = getenv( "hostname" )) != NULL )
-    {
-      sprintf( &build_buf[ strlen( build_buf - 1 ) ], "host:%s ", tmp );
-    }
-    else
-    {
-      sprintf( &build_buf[ strlen( build_buf - 1 ) ], ": " );
-    }
-
-    if(( tmp = getenv( "ipaddr" )) != NULL )
-    {
-      sprintf( &build_buf[ strlen( build_buf - 1 ) ], "e=%s ", tmp );
-    }
-    memcpy( (void *)bootaddr, build_buf, MAX( strlen( build_buf ), 255 ));
-#else
-
-    /* I'm not sure what the device should be for other
-       PPC flavors, the hostname and ipaddr should be ok to just copy */
-    
-    printf( "No bootargs defined\n" );
-    return 1;
-#endif
-  }
-
-  /* If the data at the load address is an elf image, then treat it like
-     an elf image.  Otherwise, assume that it is a binary image */
-  
-  if( valid_elf_image( addr ))
-  {
-    addr = load_elf_image( addr );
-  }
-  else
-  {
-    printf( "## Not an ELF image, assuming binary\n" );
-    /* leave addr as load_addr */
-  }
-
-  printf ("## Starting vxWorks at 0x%08lx ...\n", addr);
-
-  ((void (*)(void))addr)();
-
-  printf ("## vxWorks terminated\n" );
-  return 1;
-} /* do_bootvx */
-
-
-\f
-/* ======================================================================
- * Determine if a valid ELF image exists at the given memory location.
- * First looks at the ELF header magic field, the makes sure that it is
- * executable and makes sure that it is for a PowerPC.
- * ====================================================================== */
-
-int valid_elf_image( unsigned long addr )
-{
-  Elf32_Ehdr * ehdr;   /* Elf header structure pointer */
-  /* -------------------------------------------------- */
-
-  ehdr = (Elf32_Ehdr *)addr;
-
-  if( ! IS_ELF( *ehdr )) {
-    printf( "## No elf image at address 0x%08lx\n", addr );
-    return 0;
-  }
-
-  if( ehdr->e_type != ET_EXEC ) {
-    printf( "## Not a 32-bit elf image at address 0x%08lx\n", addr );
-    return 0;
-  }
-
-  if( ehdr->e_machine != EM_PPC ) {
-    printf( "## Not a PowerPC elf image at address 0x%08lx\n", addr );
-    return 0;
-  }
-
-  return 1;
-} /* valid_elf_image */
-
-
-\f
-/* ======================================================================
- * A very simple elf loader, assumes the image is valid, returns the
- * entry point address.
- * ====================================================================== */
-
-unsigned long load_elf_image( unsigned long addr )
-{
-  Elf32_Ehdr *         ehdr;           /* Elf header structure pointer     */
-  Elf32_Shdr *         shdr;           /* Section header structure pointer */
-  unsigned char *      strtab = 0;     /* String table pointer             */
-  unsigned char *      image;          /* Binary image pointer             */
-  int                  i;              /* Loop counter                     */
-  /* -------------------------------------------------- */
-  
-  ehdr = (Elf32_Ehdr *)addr;
-
-  /* Find the section header string table for output info */
-  shdr = (Elf32_Shdr *)(addr + ehdr->e_shoff +
-                       (ehdr->e_shstrndx * sizeof( Elf32_Shdr )));
-  
-  if( shdr->sh_type == SHT_STRTAB )
-    strtab = ( unsigned char *)(addr + shdr->sh_offset);
-
-  /* Load each appropriate section */
-  for( i = 0; i < ehdr->e_shnum; ++i ) {
-    shdr = (Elf32_Shdr *)(addr + ehdr->e_shoff + (i * sizeof( Elf32_Shdr )));
-
-    if( !( shdr->sh_flags & SHF_ALLOC )
-       || shdr->sh_type == SHT_NOBITS
-       || shdr->sh_addr == 0
-       || shdr->sh_size == 0 )
-      continue;
-
-    if( strtab ) {
-      printf( "Loading %s @ 0x%08lx (%ld bytes)\n",
-             &strtab[ shdr->sh_name ], (unsigned long)shdr->sh_addr,
-              (long)shdr->sh_size );
-    }
-    
-    image = (unsigned char *)addr + shdr->sh_offset;
-    memcpy( (void *)shdr->sh_addr, (const void *)image, shdr->sh_size );
-  }
-
-  return ehdr->e_entry;
-} /* load_elf_image */
-
-
 /* ====================================================================== */
 #endif /* CFG_CMD_BEDBUG */
 

diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 798bc753c9c845b790dd35fb7a985eac8159bfa3..9f9650ee898ca3bca032958aeb0ffc82bb79bda1 100644 (file)
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -62,6 +62,10 @@ typedef void boot_os_Fcn (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *
 
 static boot_os_Fcn do_bootm_linux;
 static boot_os_Fcn do_bootm_netbsd;
+#if (CONFIG_COMMANDS & CFG_CMD_ELF)
+static boot_os_Fcn do_bootm_vxworks;
+int do_bootvx( cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[] );
+#endif /* CFG_CMD_ELF */
 
 image_header_t header;
 
@@ -229,6 +233,12 @@ int do_bootm (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
            do_bootm_netbsd (cmdtp, bd, flag, argc, argv,
                             addr, len_ptr, verify);
            break;
+#if (CONFIG_COMMANDS & CFG_CMD_ELF)
+       case IH_OS_VXWORKS:
+           do_bootm_vxworks (cmdtp, bd, flag, argc, argv,
+                              addr, len_ptr, verify);
+           break;
+#endif /* CFG_CMD_ELF */
        }
 
 #ifdef DEBUG
@@ -698,6 +708,7 @@ print_type (image_header_t *hdr)
        case IH_OS_INVALID:     os = "Invalid OS";              break;
        case IH_OS_NETBSD:      os = "NetBSD";                  break;
        case IH_OS_LINUX:       os = "Linux";                   break;
+       case IH_OS_VXWORKS:     os = "VxWorks";                 break;
        case IH_OS_PPCBOOT:     os = "PPCBoot";                 break;
        default:                os = "Unknown OS";              break;
        }
@@ -819,3 +830,17 @@ int gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
 
        return (0);
 }
+
+#if (CONFIG_COMMANDS & CFG_CMD_ELF)
+static void
+do_bootm_vxworks (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[],
+                  ulong addr, ulong *len_ptr, int verify)
+{
+       image_header_t *hdr = &header;
+        char str[80];
+
+        sprintf(str, "%x", hdr->ih_ep); /* write entry-point into string */
+        setenv("loadaddr", str);
+        do_bootvx(cmdtp, bd, 0, 0, NULL);
+}
+#endif /* CFG_CMD_ELF */

diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index 1415ebf531bc64197bb86e0b0d0f7a85de593d5b..2bd30c263bceaf636b874ded04b9264151170d25 100644 (file)
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -447,7 +447,7 @@ void ide_init (bd_t *bd)
        if (pcmcia_on())
                return;
        udelay (1000000);       /* 1 s */
-#endif
+#endif /* CONFIG_IDE_PCCARD */
 
 #if defined(CONFIG_WATCHDOG)
        watchdog_reset ();
@@ -470,7 +470,6 @@ void ide_init (bd_t *bd)
                    pio_config_ns[i].t_hold,   pio_config_clk[i].t_hold);
        }
 
-
        /* Reset the IDE just to be sure.
         * Light LED's to show
         */
@@ -680,7 +679,7 @@ outb(int dev, int port, unsigned char val)
        __asm__ volatile("eieio");
        *((uchar *)(ATA_CURR_BASE(dev)+port)) = val;
 #if 0
-printf ("OUTB: 0x%08lx <== 0x%02x\n", ATA_CURR_BASE(dev)+port, val);
+       printf ("OUTB: 0x%08lx <== 0x%02x\n", ATA_CURR_BASE(dev)+port, val);
 #endif
 }
 
@@ -692,7 +691,7 @@ inb(int dev, int port)
        __asm__ volatile("eieio");
        val = *((uchar *)(ATA_CURR_BASE(dev)+port));
 #if 0
-printf ("INB: 0x%08lx ==> 0x%02x\n", ATA_CURR_BASE(dev)+port, val);
+       printf ("INB: 0x%08lx ==> 0x%02x\n", ATA_CURR_BASE(dev)+port, val);
 #endif
        return (val);
 }
@@ -839,7 +838,7 @@ static void ide_ident (block_dev_desc_t *dev_desc)
                if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
                if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
        }
-printf ("PIO mode to use: PIO %d\n", mode);
+       printf ("PIO mode to use: PIO %d\n", mode);
 #endif
 
 #ifdef CONFIG_ATAPI

diff --git a/common/command.c b/common/command.c
index ad147323bb36ca995e12f3286efbe2777f02eed8..bbcfc4b239c552d0d4f8ffe2a70d4a2286d399dc 100644 (file)
--- a/common/command.c
+++ b/common/command.c
@@ -57,6 +57,8 @@
 
 #include <cmd_bedbug.h>
 
+#include <cmd_elf.h>
+
 /*
  * HELP command
  */

diff --git a/common/console.c b/common/console.c
index e6b9124d133621ed6f29985bc29e79e7228177a7..1d47418be8d31e8e5acf2aa2876c0aeeb87ca9ae 100644 (file)
--- a/common/console.c
+++ b/common/console.c
@@ -385,6 +385,7 @@ void console_init_r (ulong reloc_offset)
                console_setfile (stdin, inputdev);
        }
 
+#ifndef CFG_CONSOLE_INFO_QUIET
        /* Print information */
        printf ("In:    ");
        if (stdio_devices[stdin] == NULL) {
@@ -406,6 +407,7 @@ void console_init_r (ulong reloc_offset)
        } else {
                printf ("%s\n", stdio_devices[stderr]->name);
        }
+#endif /* CFG_CONSOLE_INFO_QUIET */
 
 #ifdef CFG_CONSOLE_ENV_OVERWRITE
        /* set the environment variables (will overwrite previous env settings) */
@@ -462,6 +464,7 @@ void console_init_r (ulong reloc_offset)
                console_setfile (stdin, inputdev);
        }
 
+#ifndef CFG_CONSOLE_INFO_QUIET
        /* Print informations */
        printf ("In:    ");
        if (stdio_devices[stdin] == NULL) {
@@ -483,6 +486,7 @@ void console_init_r (ulong reloc_offset)
        } else {
                printf ("%s\n", stdio_devices[stderr]->name);
        }
+#endif /* CFG_CONSOLE_INFO_QUIET */
 
        /* Setting environment variables */
        for (i = 0; i < 3; i++) {

diff --git a/config.mk b/config.mk
index 3c7f9beebc160cbeaab45d310354b34a2f6f4f1c..19d4fb093628ea2fae56b1650c1dec0f18d08f16 100644 (file)
--- a/config.mk
+++ b/config.mk
@@ -35,7 +35,9 @@ PLATFORM_CPPFLAGS=
 ifeq ($(CROSS_COMPILE),powerpc-netbsd-)
 PLATFORM_CPPFLAGS+= -D__PPC__
 endif
-
+ifeq ($(CROSS_COMPILE),powerpc-openbsd-)
+PLATFORM_CPPFLAGS+= -D__PPC__
+endif
 
 ifdef  ARCH
 sinclude $(TOPDIR)/$(ARCH)/config.mk   # include architecture dependend rules

diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c
index eff8538272dd99953797caa69a783ad00488ff82..0da0ce3fabb4fd572fbab45bda24abb9983004a4 100644 (file)
--- a/cpu/mpc8xx/cpu.c
+++ b/cpu/mpc8xx/cpu.c
@@ -462,8 +462,11 @@ reset_8xx_watchdog(volatile immap_t *immr)
 {
 # if defined(CONFIG_LWMON)
        /*
-        * The LWMON board uses a MAX706TESA Watchdog
+        * The LWMON board uses a MAX6301 Watchdog
         * with the trigger pin connected to port PA.7
+        *
+         * (The old board version used a MAX706TESA Watchdog, which
+        * had to be handled exactly the same.)
         */
 # define WATCHDOG_BIT  0x0100
        immr->im_ioport.iop_papar &= ~(WATCHDOG_BIT);   /* GPIO         */

diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c
index b155cedc660c183f8eb76b6fb4e712ebcb25994b..de7db2d50573ebace59fd990288c00cf492a9c42 100644 (file)
--- a/cpu/mpc8xx/fec.c
+++ b/cpu/mpc8xx/fec.c
@@ -39,7 +39,7 @@ static void mii_discover_phy(void);
 
 #define TX_BUF_CNT 2
 
-#define TOUT_LOOP 100000
+#define TOUT_LOOP 100
 
 #define PKT_MAXBUF_SIZE         1518
 #define PKT_MINBUF_SIZE         64
@@ -333,10 +333,27 @@ int eth_init (bd_t * bd)
        } else {
                immr->im_ioport.iop_pddir = 0x1fff;     /* Rev. D and later */
        }
-#else  /* defined(CONFIG_ICU862) */
-       /* Configure PCMCIA PORT A for MII, UTOPIA is enabled.
-        */
-       immr->im_ioport.iop_pdpar |= 0x4080;
+#else
+       /* Configure port A for MII.
+       */
+
+       /* Has Utopia been configured? */
+       if (immap->im_ioport.iop_pdpar & (0x8000 >> 1)) {
+               /*
+                * YES - Use MUXED mode for UTOPIA bus.
+                * This frees Port A for use by MII (see 862UM table 41-6).
+                */
+               immap->im_ioport.utmode &= ~0x80;
+       } else {
+               /*
+                * NO - set SPLIT mode for UTOPIA bus.
+                *
+                 * This doesn't really effect UTOPIA (which isn't
+                 * enabled anyway) but just tells the 862
+                * to use port A for MII (see 862UM table 41-6).
+                */
+               immap->im_ioport.utmode |= 0x80;
+       }
 #endif /* !defined(CONFIG_ICU862) */
 
        rxIdx = 0;

diff --git a/cpu/mpc8xx/scc.c b/cpu/mpc8xx/scc.c
index 6f9ac8a39e52e77c8e6a43fdfec4edcdd9046573..0fa72e3f4da295b879f04b23e1b9bfa07554eef6 100644 (file)
--- a/cpu/mpc8xx/scc.c
+++ b/cpu/mpc8xx/scc.c
@@ -44,7 +44,7 @@
 
 #define TX_BUF_CNT 2
 
-#define TOUT_LOOP 1000000
+#define TOUT_LOOP 100
 
 static char txbuf[DBUF_LENGTH];
 
@@ -94,12 +94,18 @@ int eth_send(volatile void *packet, int length)
        if (txIdx >= TX_BUF_CNT) txIdx = 0;
 #endif
 
-       while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) j++;
+       while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) {
+               udelay (1);     /* will also trigger Wd if needed */
+               j++;
+       }
        if (j>=TOUT_LOOP) printf("TX not ready\n");
        rtx->txbd[txIdx].cbd_bufaddr = (uint)packet;
        rtx->txbd[txIdx].cbd_datlen = length;
        rtx->txbd[txIdx].cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_LAST |BD_ENET_TX_WRAP);
-       while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) j++;
+       while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) {
+               udelay (1);     /* will also trigger Wd if needed */
+               j++;
+       }
        if (j>=TOUT_LOOP) printf("TX timeout\n");
 #ifdef ET_DEBUG
        printf("cycles: %d    status: %x\n", j, rtx->txbd[txIdx].cbd_sc);

diff --git a/cpu/mpc8xx/upatch.c b/cpu/mpc8xx/upatch.c
index edefdfe20266a60dd184ac7f64569e4d93c9f104..fe7e07638d31b261fdec4677378ce7aa093a7ed1 100644 (file)
--- a/cpu/mpc8xx/upatch.c
+++ b/cpu/mpc8xx/upatch.c
@@ -34,7 +34,7 @@ void cpm_load_patch (volatile immap_t *immr)
 
        /*
          * Enable DPRAM microcode to execute from the first 512 bytes
-         * and a 256 byte extension of DPRAM. */
+         * and a 256 byte extension of DPRAM.
         */
        immr->im_cpm.cp_rccr |= 0x0001;
 }

diff --git a/cpu/ppc4xx/405gp_enet.c b/cpu/ppc4xx/405gp_enet.c
index 5e2b5119932bb53f0452686038c4dc9082bfde89..adfe4740a755f6f97d3c1a6c99c89d975028842c 100644 (file)
--- a/cpu/ppc4xx/405gp_enet.c
+++ b/cpu/ppc4xx/405gp_enet.c
@@ -55,6 +55,8 @@
   |              - Enet speed and duplex output now in one line
   |  08-May-01   stefan.roese@esd-electronics.com
   |              - MAL error handling added (eth_init called again)
+  |  13-Nov-01   stefan.roese@esd-electronics.com
+  |              - Set IST bit in EMAC_M1 reg upon 100MBit or full duplex
   +-----------------------------------------------------------------------------*/
 
 #include <ppcboot.h>
@@ -367,11 +369,11 @@ int eth_init (bd_t *bis)
 
   /* set speed */
   if (speed == _100BASET)
-    mode_reg = mode_reg | EMAC_M1_MF_100MBPS;
+    mode_reg = mode_reg | EMAC_M1_MF_100MBPS | EMAC_M1_IST;
   else
     mode_reg = mode_reg & ~0x00C00000;  /* 10 MBPS */
   if( duplex == FULL)
-    mode_reg = mode_reg | 0x80000000;
+    mode_reg = mode_reg | 0x80000000 | EMAC_M1_IST;
 
   out32 (EMAC_M1, mode_reg);
 

diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c
index 5d0c5f1bf3d0087bd8890ba4f933f10248d16e36..b571be203d27238627639dec340deeaf40df97fd 100644 (file)
--- a/cpu/ppc4xx/cpu_init.c
+++ b/cpu/ppc4xx/cpu_init.c
@@ -27,14 +27,79 @@
 #include <ppc4xx.h>
 
 
+#define mtebc(reg, data)  mtdcr(ebccfga,reg);mtdcr(ebccfgd,data)
+
+
 /*
  * Breath some life into the CPU...
  *
- * On 4xx: allready done in start.S
+ * Set up the memory map,
+ * initialize a bunch of registers
  */
 void
 cpu_init_f (void)
 {
+  /*
+   * External Bus Controller (EBC) Setup
+   */
+#if (defined(CFG_EBC_PB0AP) && defined(CFG_EBC_PB0CR))
+  /*
+   * Move the next instructions into icache, since these modify the flash
+   * we are running from!
+   */
+  asm volatile("
+        bl      0f;
+0:      mflr    3;
+        addi    4,0,14;
+        mtctr   4;
+1:      icbt    0,3;
+        addi    3,3,32;
+        bdnz    1b;
+       addis   3,0,0x0;
+        ori     3,3,0xA000;
+        mtctr   3;
+2:      bdnz    2b;
+        " ::: "r3", "r4", "lr");
+
+  mtebc(pb0ap, CFG_EBC_PB0AP);
+  mtebc(pb0cr, CFG_EBC_PB0CR);
+#endif
+
+#if (defined(CFG_EBC_PB1AP) && defined(CFG_EBC_PB1CR))
+  mtebc(pb1ap, CFG_EBC_PB1AP);
+  mtebc(pb1cr, CFG_EBC_PB1CR);
+#endif
+
+#if (defined(CFG_EBC_PB2AP) && defined(CFG_EBC_PB2CR))
+  mtebc(pb2ap, CFG_EBC_PB2AP);
+  mtebc(pb2cr, CFG_EBC_PB2CR);
+#endif
+
+#if (defined(CFG_EBC_PB3AP) && defined(CFG_EBC_PB3CR))
+  mtebc(pb3ap, CFG_EBC_PB3AP);
+  mtebc(pb3cr, CFG_EBC_PB3CR);
+#endif
+
+#if (defined(CFG_EBC_PB4AP) && defined(CFG_EBC_PB4CR))
+  mtebc(pb4ap, CFG_EBC_PB4AP);
+  mtebc(pb4cr, CFG_EBC_PB4CR);
+#endif
+
+#if (defined(CFG_EBC_PB5AP) && defined(CFG_EBC_PB5CR))
+  mtebc(pb5ap, CFG_EBC_PB5AP);
+  mtebc(pb5cr, CFG_EBC_PB5CR);
+#endif
+
+#if (defined(CFG_EBC_PB6AP) && defined(CFG_EBC_PB6CR))
+  mtebc(pb6ap, CFG_EBC_PB6AP);
+  mtebc(pb6cr, CFG_EBC_PB6CR);
+#endif
+
+#if (defined(CFG_EBC_PB7AP) && defined(CFG_EBC_PB7CR))
+  mtebc(pb7ap, CFG_EBC_PB7AP);
+  mtebc(pb7cr, CFG_EBC_PB7CR);
+#endif
+
 #if defined(CONFIG_WATCHDOG)
   unsigned long val;
 

diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index 2817a8b1a8df7fd3ff86ad3ff4dc7ec82e016905..d532e1ea506118d808c8acb94cdf9482b16f9241 100644 (file)
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -303,16 +303,18 @@ _start:
        addi    r4,r4,0x0000
        mtdccr  r4                      // data cache
 
+#if !(defined(CFG_EBC_PB0AP) && defined(CFG_EBC_PB0CR))
        //-----------------------------------------------------------------------
        // Tune the speed and size for flash CS0 
        //-----------------------------------------------------------------------
        bl      ext_bus_cntlr_init
+#endif
 
        //-----------------------------------------------------------------------
        // Initialize SDRAM Controller
        //-----------------------------------------------------------------------
        bl      sdram_init
-        
+
 #ifdef CFG_INIT_DCACHE_CS
        //-----------------------------------------------------------------------
        // Memory Bank x (nothingness) initialization 1GB+64MEG

diff --git a/include/cmd_bedbug.h b/include/cmd_bedbug.h
index ebe43f2a255fb70b69c5dae12ebb7a88106efc70..3ab9ef2bb69f9215a177f28d9cb662a346b530d5 100644 (file)
--- a/include/cmd_bedbug.h
+++ b/include/cmd_bedbug.h
@@ -57,17 +57,6 @@
        " - Show registers.\n"                                          \
         ),
 
-#define CMD_TBL_BOOTELF MK_CMD_TBL_ENTRY(                               \
-        "bootelf",      7,      2,      0,      do_bootelf,             \
-        "bootelf - Boot from an ELF image in memory\n",                 \
-        " [address] - load address of ELF image.\n"                     \
-        ),
-
-#define CMD_TBL_BOOTVX  MK_CMD_TBL_ENTRY(                               \
-        "bootvx",       6,      2,      0,      do_bootvx,              \
-        "bootvx  - Boot vxWorks from an ELF image\n",                   \
-        " [address] - load address of vxWorks ELF image.\n"             \
-        ),
 extern int do_bedbug_dis (cmd_tbl_t *, bd_t *, int, int, char *[]);
 extern int do_bedbug_asm (cmd_tbl_t *, bd_t *, int, int, char *[]);
 extern int do_bedbug_break (cmd_tbl_t *, bd_t *, int, int, char *[]);
@@ -77,16 +66,11 @@ extern int do_bedbug_next (cmd_tbl_t *, bd_t *, int, int, char *[]);
 extern int do_bedbug_stack (cmd_tbl_t *, bd_t *, int, int, char *[]);
 extern int do_bedbug_rdump (cmd_tbl_t *, bd_t *, int, int, char *[]);
 
-extern int do_bootelf (cmd_tbl_t *, bd_t *, int, int, char *[]);
-extern int do_bootvx (cmd_tbl_t *, bd_t *, int, int, char *[]);
-
 /* Supporting routines */
 extern int           bedbug_puts (const char *);
 extern void          bedbug_init (void);
 extern void          do_bedbug_breakpoint (struct pt_regs*);
 extern void          bedbug_main_loop (unsigned long,struct pt_regs *);
-extern int           valid_elf_image (unsigned long);
-extern unsigned long load_elf_image (unsigned long);
 
 
 typedef struct {
@@ -114,8 +98,6 @@ typedef struct {
 #define CMD_TBL_NEXT
 #define CMD_TBL_STACK
 #define CMD_TBL_RDUMP
-#define CMD_TBL_BOOTELF
-#define CMD_TBL_BOOTVX
 
 #endif /* CFG_CMD_BEDBUG */
 #endif /* _CMD_BEDBUG_H */

diff --git a/include/cmd_confdefs.h b/include/cmd_confdefs.h
index 5d1411ef7f45ca0b8f2e2af3187a2912f3839e0c..d74075f2f364e26009c6f4020a85623585503d63 100644 (file)
--- a/include/cmd_confdefs.h
+++ b/include/cmd_confdefs.h
@@ -59,12 +59,14 @@
 #define CFG_CMD_BEDBUG  0x02000000      /* Include BedBug Debugger      */
 #define        CFG_CMD_FDC     0x04000000      /* Floppy Disk Support  */
 #define        CFG_CMD_SCSI    0x08000000      /* SCSI Support */
-#define        CFG_CMD_AUTOSCRIPT      0x10000000      /* Autoscript Support   */
+#define        CFG_CMD_AUTOSCRIPT  0x10000000  /* Autoscript Support   */
 #define        CFG_CMD_MII     0x20000000      /* MII support                  */
-#define CFG_CMD_SETGETDCR 0x40000000   /* DCR support on 4xx           */
+#define CFG_CMD_SETGETDCR   0x40000000 /* DCR support on 4xx           */
 #define        CFG_CMD_BSP     0x80000000      /* Board Specific functions     */
 
-#define CFG_CMD_ALL    0xFFFFFFFF      /* ALL commands                 */
+#define CFG_CMD_ELF     0x0000000100000000      /* ELF (VxWorks) load/boot cmd  */
+
+#define CFG_CMD_ALL    0xFFFFFFFFFFFFFFFF      /* ALL commands                 */
 
 /* Commands that are considered "non-standard" for some reason
  * (memory hogs, requires special hardware, not fully tested, etc.)
@@ -85,6 +87,7 @@
                        CFG_CMD_SCSI    | \
                        CFG_CMD_DATE    | \
                        CFG_CMD_BEDBUG  | \
+                       CFG_CMD_ELF     | \
                        CFG_CMD_MII     | \
                        CFG_CMD_BSP     )
 

diff --git a/include/commproc.h b/include/commproc.h
index c813c2b3e0e04851ddfabc24f8a70580ebc58102..ab685f2c052657578f6c791c367783d0509d37f3 100644 (file)
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -1088,6 +1088,9 @@ typedef struct scc_enet {
 /***  TQM860L, TQM855L ************************************************/
 
 #if (defined(CONFIG_TQM860L) || defined(CONFIG_TQM855L))
+
+# ifndef CONFIG_FEC_ENET       /* use SCC for 10Mbps Ethernet  */
+
 /* Bits in parallel I/O port registers that have to be set/cleared
  * to configure the pins for SCC1 use.
  */
@@ -1108,6 +1111,29 @@ typedef struct scc_enet {
  */
 #define SICR_ENET_MASK ((uint)0x000000ff)
 #define SICR_ENET_CLKRT        ((uint)0x00000026)
+
+# else                         /* Use FEC for Fast Ethernet */
+
+#undef SCC_ENET
+#define FEC_ENET
+
+#define PD_MII_TXD1    ((ushort)0x1000)        /* PD  3 */
+#define PD_MII_TXD2    ((ushort)0x0800)        /* PD  4 */
+#define PD_MII_TXD3    ((ushort)0x0400)        /* PD  5 */
+#define PD_MII_RX_DV   ((ushort)0x0200)        /* PD  6 */
+#define PD_MII_RX_ERR  ((ushort)0x0100)        /* PD  7 */
+#define PD_MII_RX_CLK  ((ushort)0x0080)        /* PD  8 */
+#define PD_MII_TXD0    ((ushort)0x0040)        /* PD  9 */
+#define PD_MII_RXD0    ((ushort)0x0020)        /* PD 10 */
+#define PD_MII_TX_ERR  ((ushort)0x0010)        /* PD 11 */
+#define PD_MII_MDC     ((ushort)0x0008)        /* PD 12 */
+#define PD_MII_RXD1    ((ushort)0x0004)        /* PD 13 */
+#define PD_MII_RXD2    ((ushort)0x0002)        /* PD 14 */
+#define PD_MII_RXD3    ((ushort)0x0001)        /* PD 15 */
+
+#define PD_MII_MASK    ((ushort)0x1FFF)        /* PD 3...15 */
+
+# endif        /* CONFIG_FEC_ENET */
 #endif /* CONFIG_TQM860L, CONFIG_TQM855L */
 
 /*********************************************************************/

diff --git a/include/config_ADCIOP.h b/include/config_ADCIOP.h
index f08748bf77ae71a9d8a058e7f1a0870e065eb511..0cb487b6a6c756bd5381c345a2292571e39c1572 100644 (file)
--- a/include/config_ADCIOP.h
+++ b/include/config_ADCIOP.h
@@ -60,7 +60,7 @@
 #define CONFIG_COMMANDS              ( CONFIG_CMD_DFL  | \
                                CFG_CMD_DHCP    | \
                                CFG_CMD_IRQ     | \
-                               CFG_CMD_BEDBUG  | \
+                               CFG_CMD_ELF     | \
                                CFG_CMD_ASKENV  )
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
@@ -80,6 +80,8 @@
 #define CFG_MAXARGS    16              /* max number of command args   */
 #define CFG_BARGSIZE   CFG_CBSIZE      /* Boot Argument Buffer Size    */
 
+#define CFG_CONSOLE_INFO_QUIET  1       /* don't print console @ startup*/
+
 #define CFG_MEMTEST_START      0x0400000       /* memtest works on     */
 #define CFG_MEMTEST_END                0x0C00000       /* 4 ... 12 MB in DRAM  */
 

diff --git a/include/config_AR405.h b/include/config_AR405.h
index 5f7a367da29dcbef15e51a5a56e805c4d1aff894..c0e02b021cfa25e185afb56c7d2413983f3abe36 100644 (file)
--- a/include/config_AR405.h
+++ b/include/config_AR405.h
@@ -86,6 +86,8 @@
 #define CFG_MAXARGS    16              /* max number of command args   */
 #define CFG_BARGSIZE   CFG_CBSIZE      /* Boot Argument Buffer Size    */
 
+#define CFG_CONSOLE_INFO_QUIET  1       /* don't print console @ startup*/
+
 #define CFG_MEMTEST_START      0x0400000       /* memtest works on     */
 #define CFG_MEMTEST_END                0x0C00000       /* 4 ... 12 MB in DRAM  */
 

diff --git a/include/config_CANBT.h b/include/config_CANBT.h
index 9bb8e746f49658c7f2446dd7ad122f18cacffa3f..366cb9c407a48ac3655e8f17ebf333e6a72df061 100644 (file)
--- a/include/config_CANBT.h
+++ b/include/config_CANBT.h
@@ -80,6 +80,8 @@
 #define CFG_MAXARGS    16              /* max number of command args   */
 #define CFG_BARGSIZE   CFG_CBSIZE      /* Boot Argument Buffer Size    */
 
+#define CFG_CONSOLE_INFO_QUIET  1       /* don't print console @ startup*/
+
 #define CFG_MEMTEST_START      0x0400000       /* memtest works on     */
 #define CFG_MEMTEST_END                0x0C00000       /* 4 ... 12 MB in DRAM  */
 

diff --git a/include/config_CCM.h b/include/config_CCM.h
index f69ad23ef262ae0c398b32196dffe7472739c6bb..dfe89dc45996b833dbc2e6aaf7bffdcf54d42cfe 100644 (file)
--- a/include/config_CCM.h
+++ b/include/config_CCM.h
@@ -207,8 +207,8 @@
 #else
 /* Final version: environment in EEPROM */
 #define CFG_ENV_IS_IN_EEPROM   1
-#define CFG_ENV_OFFSET         1024
-#define CFG_ENV_SIZE           1024
+#define CFG_ENV_OFFSET         2048
+#define CFG_ENV_SIZE           2048
 #endif
 
 /*-----------------------------------------------------------------------

diff --git a/include/config_CPCI405.h b/include/config_CPCI405.h
index 581e317bd5a040b782ae33010b8fa37805fe227a..f575532d2f093763508cc684f2e4fd895604c86a 100644 (file)
--- a/include/config_CPCI405.h
+++ b/include/config_CPCI405.h
@@ -67,7 +67,7 @@
                                CFG_CMD_PCI     | \
                                CFG_CMD_IRQ     | \
                                CFG_CMD_IDE     | \
-                               CFG_CMD_BEDBUG  | \
+                               CFG_CMD_ELF     | \
                                CFG_CMD_EEPROM  )
 
 #define CONFIG_MAC_PARTITION
@@ -83,6 +83,12 @@
  */
 #define CFG_LONGHELP                   /* undef to save memory         */
 #define CFG_PROMPT     "=> "           /* Monitor Command Prompt       */
+
+#undef CFG_HUSH_PARSER                 /* use "hush" command parser    */
+#ifdef CFG_HUSH_PARSER
+#define        CFG_PROMPT_HUSH_PS2     "> "
+#endif
+
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 #define        CFG_CBSIZE      1024            /* Console I/O Buffer Size      */
 #else
@@ -92,6 +98,8 @@
 #define CFG_MAXARGS    16              /* max number of command args   */
 #define CFG_BARGSIZE   CFG_CBSIZE      /* Boot Argument Buffer Size    */
 
+#define CFG_CONSOLE_INFO_QUIET  1       /* don't print console @ startup*/
+
 #define CFG_MEMTEST_START      0x0400000       /* memtest works on     */
 #define CFG_MEMTEST_END                0x0C00000       /* 4 ... 12 MB in DRAM  */
 
@@ -237,6 +245,34 @@
 #define FLASH_BASE0_PRELIM     0xFF800000      /* FLASH bank #0        */
 #define FLASH_BASE1_PRELIM     0xFFC00000      /* FLASH bank #1        */
 
+/*-----------------------------------------------------------------------
+ * External Bus Controller (EBC) Setup
+ */
+
+/* Memory Bank 0 (Flash Bank 0) initialization                                  */
+#define CFG_EBC_PB0AP           0x92015480
+#define CFG_EBC_PB0CR           0xFFC5A000  /* BAS=0xFFC,BS=4MB,BU=R/W,BW=16bit */
+
+/* Memory Bank 1 (Flash Bank 1) initialization                                  */
+#define CFG_EBC_PB1AP           0x92015480
+#define CFG_EBC_PB1CR           0xFF85A000  /* BAS=0xFF8,BS=4MB,BU=R/W,BW=16bit */
+
+/* Memory Bank 2 (CAN0, 1, 2, Codeswitch) initialization                        */
+#define CFG_EBC_PB2AP           0x010053C0  /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */
+#define CFG_EBC_PB2CR           0xF0018000  /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit  */
+
+/* Memory Bank 3 (CompactFlash IDE) initialization                              */
+#define CFG_EBC_PB3AP           0x010053C0  /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */
+#define CFG_EBC_PB3CR           0xF011A000  /* BAS=0xF01,BS=1MB,BU=R/W,BW=16bit */
+
+/* Memory Bank 4 (NVRAM) initialization                                         */
+#define CFG_EBC_PB4AP           0x01005280  /* TWT=2,WBN=1,WBF=1,TH=1,SOR=1     */
+#define CFG_EBC_PB4CR           0xF0218000  /* BAS=0xF02,BS=1MB,BU=R/W,BW=8bit  */
+
+/* Memory Bank 5 (Quart) initialization                                         */
+#define CFG_EBC_PB5AP           0x04005B80  /* TWT=8,WBN=1,WBF=1,TH=5,RE=1,SOR=1*/
+#define CFG_EBC_PB5CR           0xF0318000  /* BAS=0xF03,BS=1MB,BU=R/W,BW=8bit  */
+
 
 /* On Chip Memory location */
 #define OCM_DATA_ADDR          0xF8000000
@@ -247,9 +283,13 @@
 /*-----------------------------------------------------------------------
  * Definitions for initial stack pointer and data area (in data cache)
  */
+#if 1 /* test-only */
 #define CFG_INIT_DCACHE_CS      7       /* use cs # 7 for data cache memory    */
 
 #define CFG_INIT_RAM_ADDR       0x40000000  /* use data cache                  */
+#else
+#define CFG_INIT_RAM_ADDR      0x00df0000 /* inside of SDRAM                   */
+#endif
 #define CFG_INIT_RAM_END        0x2000  /* End of used area in RAM             */
 #define CFG_INIT_DATA_SIZE      128  /* size in bytes reserved for initial data */
 #define CFG_INIT_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_INIT_DATA_SIZE)

diff --git a/include/config_CPCIISER4.h b/include/config_CPCIISER4.h
index eb9d4f79563525edfb6147178ddbb5d85307a08b..e89108592f2965059906ab0f127a3d3acabb80e5 100644 (file)
--- a/include/config_CPCIISER4.h
+++ b/include/config_CPCIISER4.h
@@ -54,7 +54,7 @@
 #define CONFIG_COMMANDS              ( CONFIG_CMD_DFL  | \
                                CFG_CMD_PCI     | \
                                CFG_CMD_IRQ     | \
-                               CFG_CMD_BEDBUG  | \
+                               CFG_CMD_ELF     | \
                                CFG_CMD_EEPROM  )
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
@@ -76,6 +76,8 @@
 #define CFG_MAXARGS    16              /* max number of command args   */
 #define CFG_BARGSIZE   CFG_CBSIZE      /* Boot Argument Buffer Size    */
 
+#define CFG_CONSOLE_INFO_QUIET  1       /* don't print console @ startup*/
+
 #define CFG_MEMTEST_START      0x0400000       /* memtest works on     */
 #define CFG_MEMTEST_END                0x0C00000       /* 4 ... 12 MB in DRAM  */
 

diff --git a/include/config_DASA_SIM.h b/include/config_DASA_SIM.h
index 755110a59195b48c5d7fa93b7366ffea46c7198f..75f3b4387d69b576f43be9ef6e22d0d15a02c8f3 100644 (file)
--- a/include/config_DASA_SIM.h
+++ b/include/config_DASA_SIM.h
@@ -61,7 +61,7 @@
                                CFG_CMD_IRQ     | \
                                CFG_CMD_BSP     | \
                                CFG_CMD_ASKENV  | \
-                               CFG_CMD_BEDBUG  )
+                               CFG_CMD_ELF     )
 #else
 #define CONFIG_COMMANDS              ( CONFIG_CMD_DFL  | \
                                CFG_CMD_EEPROM  | \
@@ -87,6 +87,8 @@
 #define CFG_MAXARGS    16              /* max number of command args   */
 #define CFG_BARGSIZE   CFG_CBSIZE      /* Boot Argument Buffer Size    */
 
+#define CFG_CONSOLE_INFO_QUIET  1       /* don't print console @ startup*/
+
 #define CFG_MEMTEST_START      0x0400000       /* memtest works on     */
 #define CFG_MEMTEST_END                0x0C00000       /* 4 ... 12 MB in DRAM  */
 

diff --git a/include/config_ICU862.h b/include/config_ICU862.h
index 2cd20b6a2bb989868b2447a296ac1a1132f43cd6..c5dde13255cdeeac3b32c612203600b6f5196a66 100644 (file)
--- a/include/config_ICU862.h
+++ b/include/config_ICU862.h
@@ -89,11 +89,19 @@
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
 
+#define CONFIG_SOFT_I2C                        /* Software I2C support enabled */
+# define CFG_I2C_SPEED         50000
+# define CFG_I2C_SLAVE         0xFE
+# define CFG_EEPROM_PAGE_WRITE_BITS 4  /* The Xicor X40431 has 16 byte */
+                                       /* page write mode using last   */
+                                       /* 4 bits of the address        */
+
 #define        CONFIG_RTC_MPC8xx               /* use internal RTC of MPC8xx   */
 
 #define CONFIG_COMMANDS              ( CONFIG_CMD_DFL  | \
                                CFG_CMD_ASKENV  | \
                                CFG_CMD_DHCP    | \
+                               CFG_CMD_EEPROM  | \
                                CFG_CMD_IDE     | \
                                CFG_CMD_DATE    )
 
@@ -188,6 +196,12 @@
 
 #define CFG_ENV_SECT_SIZE      0x40000 /* see README - env sector total size   */
 
+/*-----------------------------------------------------------------------
+ * I2C/EEPROM Configuration
+ */
+//#define CFG_I2C_CLOCK                33000   /* I²C Clock Rate in kHz                */
+//#define CFG_I2C_EEPROM_ADDR  0x58    /* EEPROM AT24C164                      */
+
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */

diff --git a/include/config_LANTEC.h b/include/config_LANTEC.h
index 3dc93eab06a6445ed784452ab5a4596a05ff015c..fefc7fd808d9bde8603c0fd04ebb1eabcd541829 100644 (file)
--- a/include/config_LANTEC.h
+++ b/include/config_LANTEC.h
@@ -84,6 +84,7 @@
 #define CONFIG_CMD_NORMAL      (CONFIG_CMD_DFL & ~CFG_CMD_BOOTD)
 #define CONFIG_CMD_GDB         (CONFIG_CMD_NORMAL | CFG_CMD_KGDB)
 #define CONFIG_CMD_FULL                (CFG_CMD_ALL & ~CFG_CMD_BEDBUG  \
+                                            & ~CFG_CMD_ELF     \
                                             & ~CFG_CMD_BSP     \
                                             & ~CFG_CMD_EEPROM  \
                                             & ~CFG_CMD_FDC     \

diff --git a/include/config_MBX.h b/include/config_MBX.h
index 674b02da1d7319227318847bea9054ecd426b0c1..8f4a2ce096de5e2167bb78b167136096281a7bfb 100644 (file)
--- a/include/config_MBX.h
+++ b/include/config_MBX.h
@@ -63,7 +63,7 @@
 
 #undef CONFIG_WATCHDOG                 /* watchdog disabled            */
 
-#define CONFIG_COMMANDS                (CONFIG_CMD_DFL | CFG_CMD_BEDBUG)
+#define CONFIG_COMMANDS                (CONFIG_CMD_DFL | CFG_CMD_BEDBUG | CFG_CMD_ELF)
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>

diff --git a/include/config_MPC8260ADS.h b/include/config_MPC8260ADS.h
index 031531b431c9b3dd068a61b22b74d6f1419d633a..8688c1967a56ee113280e86bd98d7037310bddfb 100644 (file)
--- a/include/config_MPC8260ADS.h
+++ b/include/config_MPC8260ADS.h
@@ -85,6 +85,7 @@
 
 #define CONFIG_COMMANDS                (CFG_CMD_ALL & ~( \
                                 CFG_CMD_BEDBUG | \
+                                CFG_CMD_ELF    | \
                                 CFG_CMD_BSP    | \
                                 CFG_CMD_DATE   | \
                                 CFG_CMD_EEPROM | \

diff --git a/include/config_OCRTC.h b/include/config_OCRTC.h
index 40679c4e5d141d37cdb2cd584ceee58a2c8f0e67..ce25aa59429a2c2c2df89db1006a77c997b4bb76 100644 (file)
--- a/include/config_OCRTC.h
+++ b/include/config_OCRTC.h
@@ -55,7 +55,7 @@
                                CFG_CMD_PCI     | \
                                CFG_CMD_IRQ     | \
                                CFG_CMD_ASKENV  | \
-                               CFG_CMD_BEDBUG  | \
+                               CFG_CMD_ELF     | \
                                CFG_CMD_EEPROM  )
 
 #define CONFIG_MAC_PARTITION
@@ -80,6 +80,8 @@
 #define CFG_MAXARGS    16              /* max number of command args   */
 #define CFG_BARGSIZE   CFG_CBSIZE      /* Boot Argument Buffer Size    */
 
+#define CFG_CONSOLE_INFO_QUIET  1       /* don't print console @ startup*/
+
 #define CFG_MEMTEST_START      0x0400000       /* memtest works on     */
 #define CFG_MEMTEST_END                0x0C00000       /* 4 ... 12 MB in DRAM  */
 

diff --git a/include/config_TQM823L.h b/include/config_TQM823L.h
index 18b295c09a432858562960913ab1d255533b4d42..6f95afd0c44a96f4eceec1c78cfab4c213237d0e 100644 (file)
--- a/include/config_TQM823L.h
+++ b/include/config_TQM823L.h
@@ -28,8 +28,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#undef TQM8xxL_80MHz                   /* define for 80 MHz CPU only */
-
 /*
  * High Level Configuration Options
  * (easy to change)
@@ -38,8 +36,9 @@
 #define CONFIG_MPC823          1       /* This is a MPC823 CPU         */
 #define CONFIG_TQM823L         1       /* ...on a TQM8xxL module       */
 
-#define CONFIG_LCD             1       /* use LCD controller ...       */
-#define CONFIG_NEC_NL6648BC20  1       /* and NEC NL6648BC20 display   */
+#ifdef CONFIG_LCD                      /* with LCD controller ?        */
+#define CONFIG_NEC_NL6648BC20  1       /* use NEC NL6648BC20 display   */
+#endif
 
 #define        CONFIG_8xx_CONS_SMC1    1       /* Console is on SMC1           */
 #undef CONFIG_8xx_CONS_SMC2
@@ -227,12 +226,12 @@
  *
  * If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)!
  */
-#ifdef TQM8xxL_80MHz   /* for 80 MHz, we use a 16 MHz clock * 5 */
+#ifdef CONFIG_80MHz    /* for 80 MHz, we use a 16 MHz clock * 5 */
 #define CFG_PLPRCR                                                     \
                ( (5-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST )
 #else                  /* up to 50 MHz we use a 1:1 clock */
 #define CFG_PLPRCR     (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
-#endif /* TQM8xxL_80MHz */
+#endif /* CONFIG_80MHz */
 
 /*-----------------------------------------------------------------------
  * SCCR - System Clock and reset Control Register              15-27
@@ -241,7 +240,7 @@
  * power management and some other internal clocks
  */
 #define SCCR_MASK      SCCR_EBDF11
-#ifdef TQM8xxL_80MHz   /* for 80 MHz, we use a 16 MHz clock * 5 */
+#ifdef CONFIG_80MHz    /* for 80 MHz, we use a 16 MHz clock * 5 */
 #define CFG_SCCR       (/* SCCR_TBS  | */ \
                         SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
                         SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
@@ -251,7 +250,7 @@
                         SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
                         SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
                         SCCR_DFALCD00)
-#endif /* TQM8xxL_80MHz */
+#endif /* CONFIG_80MHz */
 
 /*-----------------------------------------------------------------------
  * PCMCIA stuff

diff --git a/include/config_TQM850L.h b/include/config_TQM850L.h
index 8b5b13d290713fbcbeee855197f408d1d061d92d..a10fb94fe981807d10f9d21dba78bf16869274d4 100644 (file)
--- a/include/config_TQM850L.h
+++ b/include/config_TQM850L.h
@@ -28,8 +28,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#undef TQM8xxL_80MHz                   /* define for 80 MHz CPU only */
-
 /*
  * High Level Configuration Options
  * (easy to change)
@@ -220,12 +218,12 @@
  *
  * If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)!
  */
-#ifdef TQM8xxL_80MHz   /* for 80 MHz, we use a 16 MHz clock * 5 */
+#ifdef CONFIG_80MHz    /* for 80 MHz, we use a 16 MHz clock * 5 */
 #define CFG_PLPRCR                                                     \
                ( (5-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST )
 #else                  /* up to 50 MHz we use a 1:1 clock */
 #define CFG_PLPRCR     (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
-#endif /* TQM8xxL_80MHz */
+#endif /* CONFIG_80MHz */
 
 /*-----------------------------------------------------------------------
  * SCCR - System Clock and reset Control Register              15-27
@@ -234,7 +232,7 @@
  * power management and some other internal clocks
  */
 #define SCCR_MASK      SCCR_EBDF11
-#ifdef TQM8xxL_80MHz   /* for 80 MHz, we use a 16 MHz clock * 5 */
+#ifdef CONFIG_80MHz    /* for 80 MHz, we use a 16 MHz clock * 5 */
 #define CFG_SCCR       (/* SCCR_TBS  | */ \
                         SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
                         SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
@@ -244,7 +242,7 @@
                         SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
                         SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
                         SCCR_DFALCD00)
-#endif /* TQM8xxL_80MHz */
+#endif /* CONFIG_80MHz */
 
 /*-----------------------------------------------------------------------
  * PCMCIA stuff

diff --git a/include/config_TQM855L.h b/include/config_TQM855L.h
index bf29afa82d3a132bb139cfdbc68bb6b379b38571..e85f81ce006c30dc86ffb5f493706fce516c6e51 100644 (file)
--- a/include/config_TQM855L.h
+++ b/include/config_TQM855L.h
@@ -28,8 +28,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define        TQM8xxL_80MHz                   /* define for 80 MHz CPU only */
-
 /*
  * High Level Configuration Options
  * (easy to change)
@@ -220,12 +218,12 @@
  *
  * If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)!
  */
-#ifdef TQM8xxL_80MHz   /* for 80 MHz, we use a 16 MHz clock * 5 */
+#ifdef CONFIG_80MHz    /* for 80 MHz, we use a 16 MHz clock * 5 */
 #define CFG_PLPRCR                                                     \
                ( (5-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST )
 #else                  /* up to 50 MHz we use a 1:1 clock */
 #define CFG_PLPRCR     (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
-#endif /* TQM8xxL_80MHz */
+#endif /* CONFIG_80MHz */
 
 /*-----------------------------------------------------------------------
  * SCCR - System Clock and reset Control Register              15-27
@@ -234,7 +232,7 @@
  * power management and some other internal clocks
  */
 #define SCCR_MASK      SCCR_EBDF11
-#ifdef TQM8xxL_80MHz   /* for 80 MHz, we use a 16 MHz clock * 5 */
+#ifdef CONFIG_80MHz    /* for 80 MHz, we use a 16 MHz clock * 5 */
 #define CFG_SCCR       (/* SCCR_TBS  | */ \
                         SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
                         SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
@@ -244,7 +242,7 @@
                         SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
                         SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
                         SCCR_DFALCD00)
-#endif /* TQM8xxL_80MHz */
+#endif /* CONFIG_80MHz */
 
 /*-----------------------------------------------------------------------
  * PCMCIA stuff

diff --git a/include/config_TQM860L.h b/include/config_TQM860L.h
index 2fc154ad2fd2b487cf724f20a5bb2c903f905fba..fa4767d24243e71fd033663aa62e12b8ff9d8b39 100644 (file)
--- a/include/config_TQM860L.h
+++ b/include/config_TQM860L.h
@@ -28,8 +28,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#undef TQM8xxL_80MHz                   /* define for 80 MHz CPU only */
-
 /*
  * High Level Configuration Options
  * (easy to change)
@@ -41,6 +39,7 @@
 #define        CONFIG_8xx_CONS_SMC1    1       /* Console is on SMC1           */
 #undef CONFIG_8xx_CONS_SMC2
 #undef CONFIG_8xx_CONS_NONE
+
 #define CONFIG_BAUDRATE                115200  /* console baudrate = 115kbps   */
 #if 0
 #define CONFIG_BOOTDELAY       -1      /* autoboot disabled            */
@@ -227,12 +226,12 @@
  *
  * If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)!
  */
-#ifdef TQM8xxL_80MHz   /* for 80 MHz, we use a 16 MHz clock * 5 */
+#ifdef CONFIG_80MHz    /* for 80 MHz, we use a 16 MHz clock * 5 */
 #define CFG_PLPRCR                                                     \
                ( (5-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST )
 #else                  /* up to 50 MHz we use a 1:1 clock */
 #define CFG_PLPRCR     (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
-#endif /* TQM8xxL_80MHz */
+#endif /* CONFIG_80MHz */
 
 /*-----------------------------------------------------------------------
  * SCCR - System Clock and reset Control Register              15-27
@@ -241,7 +240,7 @@
  * power management and some other internal clocks
  */
 #define SCCR_MASK      SCCR_EBDF11
-#ifdef TQM8xxL_80MHz   /* for 80 MHz, we use a 16 MHz clock * 5 */
+#ifdef CONFIG_80MHz    /* for 80 MHz, we use a 16 MHz clock * 5 */
 #define CFG_SCCR       (/* SCCR_TBS  | */ \
                         SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
                         SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
@@ -251,7 +250,7 @@
                         SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
                         SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
                         SCCR_DFALCD00)
-#endif /* TQM8xxL_80MHz */
+#endif /* CONFIG_80MHz */
 
 /*-----------------------------------------------------------------------
  * PCMCIA stuff
@@ -392,4 +391,11 @@
 #define        BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
 #define BOOTFLAG_WARM  0x02            /* Software reboot                      */
 
+/*
+ * Sanity checks
+ */
+#if defined(CONFIG_SCC1_ENET) && defined(CONFIG_FEC_ENET)
+#error Both CONFIG_SCC1_ENET and CONFIG_FEC_ENET configured
+#endif
+
 #endif /* __CONFIG_H */

diff --git a/include/config_W7OLMC.h b/include/config_W7OLMC.h
index c49dd9b3bdc95f57263d4b6385f6df200dc2e0cc..cc99d745003971acb54633ae5a91f425a942cb3b 100644 (file)
--- a/include/config_W7OLMC.h
+++ b/include/config_W7OLMC.h
@@ -64,7 +64,7 @@
 #define CONFIG_COMMANDS                \
        (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_IRQ | CFG_CMD_ASKENV | \
         CFG_CMD_DHCP | CFG_CMD_BEDBUG | CFG_CMD_DATE | CFG_CMD_I2C | \
-        CFG_CMD_EEPROM)
+        CFG_CMD_EEPROM | CFG_CMD_ELF)
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>

diff --git a/include/config_W7OLMG.h b/include/config_W7OLMG.h
index a876a0e8b931b54c84b3609cf871a15e1b37f128..d387a05d656526ad4b1f522c37afc9e35401bef9 100644 (file)
--- a/include/config_W7OLMG.h
+++ b/include/config_W7OLMG.h
@@ -64,7 +64,7 @@
 #define CONFIG_COMMANDS                \
        (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_IRQ | CFG_CMD_ASKENV | \
         CFG_CMD_DHCP | CFG_CMD_BEDBUG | CFG_CMD_DATE | CFG_CMD_I2C | \
-        CFG_CMD_EEPROM)
+        CFG_CMD_EEPROM | CFG_CMD_ELF)
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>

diff --git a/include/config_WALNUT405.h b/include/config_WALNUT405.h
index 7716b2d68b918ffd28e66b42ab9eca84955d2abd..47f65e8a2b34e6a7cf0ee0ac97cb7bbb89fadbb4 100644 (file)
--- a/include/config_WALNUT405.h
+++ b/include/config_WALNUT405.h
@@ -89,7 +89,8 @@
                                CFG_CMD_KGDB    | \
                                CFG_CMD_DHCP    | \
                                CFG_CMD_DATE    | \
-                               CFG_CMD_BEDBUG  )
+                               CFG_CMD_BEDBUG  | \
+                               CFG_CMD_ELF     )
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>

diff --git a/include/config_hymod.h b/include/config_hymod.h
index 5e3d3b0429cf58ccf2b7cd0bf09b47631d16ee9a..3e0c0cf87115fa83cd745bfd2a388dd0fd5e0ecd 100644 (file)
--- a/include/config_hymod.h
+++ b/include/config_hymod.h
@@ -94,6 +94,7 @@
 
 #define CONFIG_COMMANDS                (CFG_CMD_ALL & ~( \
                                        CFG_CMD_BEDBUG  | \
+                                       CFG_CMD_ELF     | \
                                        CFG_CMD_FDC     | \
                                        CFG_CMD_IDE     | \
                                        CFG_CMD_MII     | \

diff --git a/include/config_lwmon.h b/include/config_lwmon.h
index faa44b61fc641b06213c152c2bf63e252e3d94bf..33a5664e8cf2de277e6dcf52a4ddce26eac48668 100644 (file)
--- a/include/config_lwmon.h
+++ b/include/config_lwmon.h
@@ -67,7 +67,9 @@
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download  */
 #undef CFG_LOADS_BAUD_CHANGE           /* don't allow baudrate change  */
 
+#if 1
 #define        CONFIG_WATCHDOG         1       /* watchdog enabled             */
+#endif
 
 #undef CONFIG_STATUS_LED               /* Status LED disabled          */
 

diff --git a/include/config_sbc8260.h b/include/config_sbc8260.h
index ccebdfba7d515034796c6a0ac3ca07bc3a611329..8f489a771f9f2436fac61590987de3db2a887ec5 100644 (file)
--- a/include/config_sbc8260.h
+++ b/include/config_sbc8260.h
@@ -287,6 +287,7 @@
 /* What ppcboot subsytems do you want enabled? */
 #define CONFIG_COMMANDS                (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
                                CFG_CMD_BEDBUG  | \
+                               CFG_CMD_ELF     | \
                                CFG_CMD_ASKENV  | \
                                CFG_CMD_ECHO    | \
                                CFG_CMD_I2C     | \

diff --git a/include/malloc.h b/include/malloc.h
index 033a77a94f08fcdcd11a0a8570d28737133eb4ff..6d5d49d46df2959937238a4c218318f5284b7024 100644 (file)
--- a/include/malloc.h
+++ b/include/malloc.h
@@ -241,17 +241,17 @@
 #endif /*Void_t*/
 
 #if __STD_C
-#include <stddef.h>   /* for size_t */
+#include <stddef.h>    /* for size_t */
 #else
 #include <sys/types.h>
-#endif
+#endif /* __STD_C */
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#if 0  /* no for PPCBOOT */
-#include <stdio.h>    /* needed for malloc_stats */
+#if 0  /* not for PPCBOOT */
+#include <stdio.h>     /* needed for malloc_stats */
 #endif
 
 

diff --git a/net/net.c b/net/net.c
index d6ddf411b31f36b27746a574dd4d751ac0a2f89e..b3943c3c42d94bfb9bc2dbff6143da806d9a35e7 100644 (file)
--- a/net/net.c
+++ b/net/net.c
@@ -209,6 +209,9 @@ restart:
         *      someone sets `NetQuit'.
         */
        for (;;) {
+#if defined(CONFIG_WATCHDOG)
+               watchdog_reset ();
+#endif /* CONFIG_WATCHDOG */
                /*
                 *      Check the ethernet for a new packet.  The ethernet
                 *      receive routine will process it.

diff --git a/net/tftp.c b/net/tftp.c
index 5660ea679f9ce809e5cf29b6fc66917967ceee40..4ee42f67e2d67908ee179d6f929e35ac6387a77f 100644 (file)
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -1,7 +1,7 @@
 /*
  *     Copyright 1994, 1995, 2000 Neil Russell.
  *     (See License)
- *     Copyright 2000 DENX Software Engineering, Wolfgang Denk, wd@denx.de
+ *     Copyright 2000, 2001 DENX Software Engineering, Wolfgang Denk, wd@denx.de
  */
 
 #include <ppcboot.h>
@@ -45,11 +45,53 @@ static int  TftpState;
 static char default_filename[DEFAULT_NAME_LEN];
 static char *tftp_filename;
 
+#ifdef CFG_DIRECT_FLASH_TFTP
+extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+#endif
+
 static __inline__ void
 store_block (unsigned block, uchar * src, unsigned len)
 {
        ulong offset = block * 512, newsize = offset + len;
+#ifdef CFG_DIRECT_FLASH_TFTP
+       int i, rc = 0;
+
+       for (i=0; i<CFG_MAX_FLASH_BANKS; i++) {
+               /* start address in flash? */
+               if (load_addr + offset >= flash_info[i].start[0]) {
+                       rc = 1;
+                       break;
+               }
+       }
+
+       if (rc) { /* Flash is destination for this packet */
+               rc = flash_write ((uchar *)src, (ulong)(load_addr+offset), len);
+               switch (rc) {
+               case 0: /* OK */
+                       break;
+               case 1: printf ("Timeout writing to Flash\n");
+                       break;
+               case 2: printf ("Flash not Erased\n");
+                       break;
+               case 4: printf ("Can't write to protected Flash sectors\n");
+                       break;
+               case 8: printf ("Outside available Flash\n");
+                       break;
+               case 16:printf ("Size must be aligned (multiple of 8?)\n");
+                       break;
+               default:
+                       printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc);
+                       break;
+               }
+               if (rc) {
+                       NetState = NETLOOP_FAIL;
+                       return;
+               }
+       }
+       else
+#endif /* CFG_DIRECT_FLASH_TFTP */
        (void)memcpy((void *)(load_addr + offset), src, len);
+
        if (NetBootFileXferSize < newsize)
                NetBootFileXferSize = newsize;
 }

diff --git a/ppc/ticks.S b/ppc/ticks.S
index a8547223e50e52e25b2a9de49bffd1f0020f4472..34ec42b2823542cecf023cef0e44652ddb6737eb 100644 (file)
--- a/ppc/ticks.S
+++ b/ppc/ticks.S
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000
+ * (C) Copyright 2000, 2001
  * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
  *  base on code by
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -25,6 +25,7 @@
 
 #include <ppc_asm.tmpl>
 #include <ppc_defs.h>
+#include <config.h>
 
 /*
  * unsigned long long get_ticks(void);
@@ -53,6 +54,10 @@ wait_ticks:
        addc    r7, r4, r7      /* Compute end time lower */
        addze   r6, r3          /*     and end time upper */
 
+#if defined(CONFIG_WATCHDOG)
+       bl      watchdog_reset  /* trigger watchdog while waiting */
+#endif
+
 1:     bl      get_ticks       /* Get current time */
        subfc   r4, r4, r7      /* Subtract current time from end time */
        subfe.  r3, r3, r6

diff --git a/tools/Makefile b/tools/Makefile
index 29bdefd274ba6bb58d3729fe25a225afa25d3495..1541598a9bd60f51dfb644b1144ff761ed22f19e 100644 (file)
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -40,6 +40,7 @@ HOSTARCH := $(shell uname -m | \
            -e s/sun4u/sparc64/ \
            -e s/arm.*/arm/ \
            -e s/sa110/arm/ \
+           -e s/powerpc/ppc/ \
            -e s/macppc/ppc/)
 
 HOSTOS := $(shell uname -s | tr A-Z a-z)