#include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
+#include <linux/timer.h>
 
 #define SPI_ENGINE_VERSION_MAJOR(x)    ((x >> 16) & 0xff)
 #define SPI_ENGINE_VERSION_MINOR(x)    ((x >> 8) & 0xff)
 
        void __iomem *base;
        struct ida sync_ida;
+       struct timer_list watchdog_timer;
+       struct spi_controller *controller;
 
        unsigned int int_enable;
 };
                struct spi_engine_message_state *st = msg->state;
 
                if (completed_id == st->sync_id) {
-                       msg->status = 0;
-                       msg->actual_length = msg->frame_length;
-                       spi_finalize_current_message(host);
+                       if (timer_delete_sync(&spi_engine->watchdog_timer)) {
+                               msg->status = 0;
+                               msg->actual_length = msg->frame_length;
+                               spi_finalize_current_message(host);
+                       }
                        disable_int |= SPI_ENGINE_INT_SYNC;
                }
        }
        unsigned int int_enable = 0;
        unsigned long flags;
 
+       mod_timer(&spi_engine->watchdog_timer, jiffies + msecs_to_jiffies(5000));
+
        spin_lock_irqsave(&spi_engine->lock, flags);
 
        if (spi_engine_write_cmd_fifo(spi_engine, msg))
        return 0;
 }
 
+static void spi_engine_timeout(struct timer_list *timer)
+{
+       struct spi_engine *spi_engine = from_timer(spi_engine, timer, watchdog_timer);
+       struct spi_controller *host = spi_engine->controller;
+
+       if (WARN_ON(!host->cur_msg))
+               return;
+
+       dev_err(&host->dev,
+               "Timeout occurred while waiting for transfer to complete. Hardware is probably broken.\n");
+       host->cur_msg->status = -ETIMEDOUT;
+       spi_finalize_current_message(host);
+}
+
 static void spi_engine_release_hw(void *p)
 {
        struct spi_engine *spi_engine = p;
 
        spin_lock_init(&spi_engine->lock);
        ida_init(&spi_engine->sync_ida);
+       timer_setup(&spi_engine->watchdog_timer, spi_engine_timeout, TIMER_IRQSAFE);
+       spi_engine->controller = host;
 
        spi_engine->clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk");
        if (IS_ERR(spi_engine->clk))