i40e: clear only cause_ena bit

When disabling interrupts, we should only be clearing the CAUSE_ENA bit,
not clearing the whole register.  Clearing the whole register sets the
NEXTQ_IDX field to 0 instead of 0x7ff which can confuse the Firmware in
some reset sequences.

Signed-off-by: Shannon Nelson <shannon.nelson@intel.com>
Signed-off-by: Mitch Williams <mitch.a.williams@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Orabug: 26785018
(cherry picked from commit 2e5c26ea0d0843074a1b8c868aae5c828c155569)
Signed-off-by: Jack Vogel <jack.vogel@oracle.com>
Reviewed-by: Kyle Fortin <kyle.fortin@oracle.com>

diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index 50052fb9c3d0e070d25f28becfabf89cf4fe0f6e..922a25b069defc0ba98d1a0fdca22ed94a9c860f 100644 (file)
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -3561,11 +3561,21 @@ static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
        int base = vsi->base_vector;
        int i;
 
+       /* disable interrupt causation from each queue */
        for (i = 0; i < vsi->num_queue_pairs; i++) {
-               wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
-               wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
+               u32 val;
+
+               val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
+               val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
+               wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
+
+               val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
+               val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
+               wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
+
        }
 
+       /* disable each interrupt */
        if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
                for (i = vsi->base_vector;
                     i < (vsi->num_q_vectors + vsi->base_vector); i++)