u32 mask;
        const int *supported;
        const phy_interface_t *interface;
+       int an_mode;
 } xpcs_id_list[] = {
        {
                .id = SYNOPSYS_XPCS_USXGMII_ID,
                .mask = SYNOPSYS_XPCS_MASK,
                .supported = xpcs_usxgmii_features,
                .interface = xpcs_usxgmii_interfaces,
+               .an_mode = DW_AN_C73,
        }, {
                .id = SYNOPSYS_XPCS_10GKR_ID,
                .mask = SYNOPSYS_XPCS_MASK,
                .supported = xpcs_10gkr_features,
                .interface = xpcs_10gkr_interfaces,
+               .an_mode = DW_AN_C73,
        }, {
                .id = SYNOPSYS_XPCS_XLGMII_ID,
                .mask = SYNOPSYS_XPCS_MASK,
                .supported = xpcs_xlgmii_features,
                .interface = xpcs_xlgmii_interfaces,
+               .an_mode = DW_AN_C73,
        },
 };
 
        return (ret & MDIO_CTRL1_RESET) ? -ETIMEDOUT : 0;
 }
 
-static int xpcs_soft_reset(struct mdio_xpcs_args *xpcs, int dev)
+static int xpcs_soft_reset(struct mdio_xpcs_args *xpcs)
 {
-       int ret;
+       int ret, dev;
+
+       switch (xpcs->an_mode) {
+       case DW_AN_C73:
+               dev = MDIO_MMD_PCS;
+               break;
+       default:
+               return -1;
+       }
 
        ret = xpcs_write(xpcs, dev, MDIO_CTRL1, MDIO_CTRL1_RESET);
        if (ret < 0)
                dev_warn(&(__xpcs)->bus->dev, ##__args); \
 })
 
-static int xpcs_read_fault(struct mdio_xpcs_args *xpcs,
-                          struct phylink_link_state *state)
+static int xpcs_read_fault_c73(struct mdio_xpcs_args *xpcs,
+                              struct phylink_link_state *state)
 {
        int ret;
 
        return 0;
 }
 
-static int xpcs_read_link(struct mdio_xpcs_args *xpcs, bool an)
+static int xpcs_read_link_c73(struct mdio_xpcs_args *xpcs, bool an)
 {
        bool link = true;
        int ret;
        return xpcs_write_vpcs(xpcs, MDIO_CTRL1, ret | DW_USXGMII_RST);
 }
 
-static int xpcs_config_aneg_c73(struct mdio_xpcs_args *xpcs)
+static int _xpcs_config_aneg_c73(struct mdio_xpcs_args *xpcs)
 {
        int ret, adv;
 
        return xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV1, adv);
 }
 
-static int xpcs_config_aneg(struct mdio_xpcs_args *xpcs)
+static int xpcs_config_aneg_c73(struct mdio_xpcs_args *xpcs)
 {
        int ret;
 
-       ret = xpcs_config_aneg_c73(xpcs);
+       ret = _xpcs_config_aneg_c73(xpcs);
        if (ret < 0)
                return ret;
 
        return xpcs_write(xpcs, MDIO_MMD_AN, MDIO_CTRL1, ret);
 }
 
-static int xpcs_aneg_done(struct mdio_xpcs_args *xpcs,
-                         struct phylink_link_state *state)
+static int xpcs_aneg_done_c73(struct mdio_xpcs_args *xpcs,
+                             struct phylink_link_state *state)
 {
        int ret;
 
 
                /* Check if Aneg outcome is valid */
                if (!(ret & DW_C73_AN_ADV_SF)) {
-                       xpcs_config_aneg(xpcs);
+                       xpcs_config_aneg_c73(xpcs);
                        return 0;
                }
 
        return 0;
 }
 
-static int xpcs_read_lpa(struct mdio_xpcs_args *xpcs,
-                        struct phylink_link_state *state)
+static int xpcs_read_lpa_c73(struct mdio_xpcs_args *xpcs,
+                            struct phylink_link_state *state)
 {
        int ret;
 
        return 0;
 }
 
-static void xpcs_resolve_lpa(struct mdio_xpcs_args *xpcs,
-                            struct phylink_link_state *state)
+static void xpcs_resolve_lpa_c73(struct mdio_xpcs_args *xpcs,
+                                struct phylink_link_state *state)
 {
        int max_speed = xpcs_get_max_usxgmii_speed(state->lp_advertising);
 
 {
        int ret;
 
-       if (state->an_enabled) {
-               ret = xpcs_config_aneg(xpcs);
-               if (ret)
-                       return ret;
+       switch (xpcs->an_mode) {
+       case DW_AN_C73:
+               if (state->an_enabled) {
+                       ret = xpcs_config_aneg_c73(xpcs);
+                       if (ret)
+                               return ret;
+               }
+               break;
+       default:
+               return -1;
        }
 
        return 0;
 }
 
-static int xpcs_get_state(struct mdio_xpcs_args *xpcs,
-                         struct phylink_link_state *state)
+static int xpcs_get_state_c73(struct mdio_xpcs_args *xpcs,
+                             struct phylink_link_state *state)
 {
        int ret;
 
        /* Link needs to be read first ... */
-       state->link = xpcs_read_link(xpcs, state->an_enabled) > 0 ? 1 : 0;
+       state->link = xpcs_read_link_c73(xpcs, state->an_enabled) > 0 ? 1 : 0;
 
        /* ... and then we check the faults. */
-       ret = xpcs_read_fault(xpcs, state);
+       ret = xpcs_read_fault_c73(xpcs, state);
        if (ret) {
-               ret = xpcs_soft_reset(xpcs, MDIO_MMD_PCS);
+               ret = xpcs_soft_reset(xpcs);
                if (ret)
                        return ret;
 
                return xpcs_config(xpcs, state);
        }
 
-       if (state->an_enabled && xpcs_aneg_done(xpcs, state)) {
+       if (state->an_enabled && xpcs_aneg_done_c73(xpcs, state)) {
                state->an_complete = true;
-               xpcs_read_lpa(xpcs, state);
-               xpcs_resolve_lpa(xpcs, state);
+               xpcs_read_lpa_c73(xpcs, state);
+               xpcs_resolve_lpa_c73(xpcs, state);
        } else if (state->an_enabled) {
                state->link = 0;
        } else if (state->link) {
        return 0;
 }
 
+static int xpcs_get_state(struct mdio_xpcs_args *xpcs,
+                         struct phylink_link_state *state)
+{
+       int ret;
+
+       switch (xpcs->an_mode) {
+       case DW_AN_C73:
+               ret = xpcs_get_state_c73(xpcs, state);
+               if (ret)
+                       return ret;
+               break;
+       default:
+               return -1;
+       }
+
+       return 0;
+}
+
 static int xpcs_link_up(struct mdio_xpcs_args *xpcs, int speed,
                        phy_interface_t interface)
 {
        for (i = 0; match->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++)
                set_bit(match->supported[i], xpcs->supported);
 
+       xpcs->an_mode = match->an_mode;
+
        return true;
 }
 
                        match = entry;
 
                        if (xpcs_check_features(xpcs, match, interface))
-                               return xpcs_soft_reset(xpcs, MDIO_MMD_PCS);
+                               return xpcs_soft_reset(xpcs);
                }
        }