#define SMC_USE_16BIT                0
   #define SMC_USE_32BIT                1
   #define SMC_IRQ_SENSE                IRQF_TRIGGER_LOW
+#elif defined(CONFIG_ARCH_OMAP34XX)
+  #define SMC_USE_16BIT                0
+  #define SMC_USE_32BIT                1
+  #define SMC_IRQ_SENSE                IRQF_TRIGGER_LOW
+  #define SMC_MEM_RESERVED     1
+#elif defined(CONFIG_ARCH_OMAP24XX)
+  #define SMC_USE_16BIT                0
+  #define SMC_USE_32BIT                1
+  #define SMC_IRQ_SENSE                IRQF_TRIGGER_LOW
+  #define SMC_MEM_RESERVED     1
 #else
 /*
  * Default configuration
 #define CHIP_9116      0x0116
 #define CHIP_9117      0x0117
 #define CHIP_9118      0x0118
+#define CHIP_9211      0x9211
 #define CHIP_9215      0x115A
 #define CHIP_9217      0x117A
 #define CHIP_9218      0x118A
        { CHIP_9116, "LAN9116" },
        { CHIP_9117, "LAN9117" },
        { CHIP_9118, "LAN9118" },
+       { CHIP_9211, "LAN9211" },
        { CHIP_9215, "LAN9215" },
        { CHIP_9217, "LAN9217" },
        { CHIP_9218, "LAN9218" },