arm64: dts: imx8: create unified pcie0 and pcie0_ep label for all chips

Add unified pcie<n> and pcie<n>_ep label for existed chipes to prepare
applied one overay file to enable EP function.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-hsio.dtsi
index afbe962d78ce1e2e9b88808619cb5d3c0f9f870d..67c5c6029cd9bd0707e3442a58457ef817af1594 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-hsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-hsio.dtsi
@@ -37,15 +37,18 @@
                power-domains = <&pd IMX_SC_R_SERDES_1>;
                status = "disabled";
        };
-};
 
-&pcieb {
-       #interrupt-cells = <1>;
-       interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
-       interrupt-names = "msi";
-       interrupt-map = <0 0 0 1 &gic 0 47 4>,
-                        <0 0 0 2 &gic 0 48 4>,
-                        <0 0 0 3 &gic 0 49 4>,
-                        <0 0 0 4 &gic 0 50 4>;
-       interrupt-map-mask = <0 0 0 0x7>;
+       pcie0: pcie@5f010000 {
+               #interrupt-cells = <1>;
+               interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "msi";
+               interrupt-map = <0 0 0 1 &gic 0 47 4>,
+                               <0 0 0 2 &gic 0 48 4>,
+                               <0 0 0 3 &gic 0 49 4>,
+                               <0 0 0 4 &gic 0 50 4>;
+               interrupt-map-mask = <0 0 0 0x7>;
+       };
+
+       pcie0_ep: pcie-ep@5f010000 {
+       };
 };

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 75a1d02d39da4b458ec910b67bc9036fa7f536f8..50a07c56faffccd6ee10bb38fbdfcdcad7f91ae2 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -2153,7 +2153,7 @@
                        };
                };
 
-               pcie: pcie@33800000 {
+               pcie0: pcie: pcie@33800000 {
                        compatible = "fsl,imx8mp-pcie";
                        reg = <0x33800000 0x400000>, <0x1ff00000 0x80000>;
                        reg-names = "dbi", "config";
@@ -2191,7 +2191,7 @@
                        status = "disabled";
                };
 
-               pcie_ep: pcie-ep@33800000 {
+               pcie0_ep: pcie_ep: pcie-ep@33800000 {
                        compatible = "fsl,imx8mp-pcie-ep";
                        reg = <0x33800000 0x100000>,
                              <0x18000000 0x8000000>,

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
index e80f722dbe65f4bc0cd9c0fc2d77a3fe457b4e31..50c0f6b0f0bdc2bd6fd3a19e08d1b7a723353783 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
@@ -12,7 +12,7 @@
        #address-cells = <1>;
        #size-cells = <1>;
 
-       pciea: pcie@5f000000 {
+       pcie0: pciea: pcie@5f000000 {
                compatible = "fsl,imx8q-pcie";
                reg = <0x5f000000 0x10000>,
                      <0x4ff00000 0x80000>;
@@ -42,7 +42,7 @@
                status = "disabled";
        };
 
-       pciea_ep: pcie-ep@5f000000 {
+       pcie0_ep: pciea_ep: pcie-ep@5f000000 {
                compatible = "fsl,imx8q-pcie-ep";
                reg = <0x5f000000 0x00010000>,
                      <0x40000000 0x10000000>;
@@ -61,7 +61,7 @@
                status = "disabled";
        };
 
-       pcieb: pcie@5f010000 {
+       pcie1: pcieb: pcie@5f010000 {
                compatible = "fsl,imx8q-pcie";
                reg = <0x5f010000 0x10000>,
                      <0x8ff00000 0x80000>;

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-hsio.dtsi
index 47fc6e0cff4a1a5925c60e4bca9f455df9b155ad..255b8c91c88ccdcb5566b4ab94edcdc51b9cd4c1 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8qxp-ss-hsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-hsio.dtsi
@@ -38,4 +38,10 @@
                power-domains = <&pd IMX_SC_R_SERDES_1>;
                status = "disabled";
        };
+
+       pcie0: pcie@5f010000 {
+       };
+
+       pcie0_ep: pcie-ep@5f010000 {
+       };
 };