Merge branches 'arnd-randcfg-fixes', 'debug', 'io' (early part), 'l2x0', 'p2v', ...

diff --cc arch/arm/Kconfig
index 3146ed3f6eca01a42068454e31f53a3330cc12c6,ed69fcde83edada58cdbae3afbfeb626bb297621,3269576dbfa8dab12d6531996e2e86de2ca309c1,2c71a8f3535a1400c2d187e7fa612e00995e6927,3269576dbfa8dab12d6531996e2e86de2ca309c1,272eadc7a12cc552497dd3ad437c0ed76f7438a1,5ebc5d922ea14984e10ef8e10f47d414469efa7c,c208fd97c180a09004967d52a7a2d6a5a3be1b27..380e4f016654f53a9e4c1919e87a56abea193cfc
--- 1/arch/arm/Kconfig
--- 2/arch/arm/Kconfig
--- 3/arch/arm/Kconfig
--- 4/arch/arm/Kconfig
--- 5/arch/arm/Kconfig
--- 6/arch/arm/Kconfig
--- 7/arch/arm/Kconfig
--- 8/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@@@@@@@@ -195,7 -195,7 -195,7 -195,8 -195,7 -195,8 -195,7 -195,7 +195,8 @@@@@@@@@ config VECTORS_BAS
                  The base address of exception vectors.
        
        config ARM_PATCH_PHYS_VIRT
--- - --        bool "Patch physical to virtual translations at runtime"
   -            bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
   -            depends on EXPERIMENTAL
+++++ ++        bool "Patch physical to virtual translations at runtime" if EMBEDDED
+++++ ++        default y
                depends on !XIP_KERNEL && MMU
                depends on !ARCH_REALVIEW || !SPARSEMEM
                help
@@@@@@@@@ -1271,32 -1276,6 -1271,18 -1272,6 -1271,18 -1267,6 -1271,6 -1271,18 +1272,32 @@@@@@@@@ config ARM_ERRATA_75432
                  This workaround defines cpu_relax() as smp_mb(), preventing correctly
                  written polling loops from denying visibility of updates to memory.
        
 + + ++ config ARM_ERRATA_364296
 + + ++         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
 + + ++         depends on CPU_V6 && !SMP
 + + ++         help
 + + ++           This options enables the workaround for the 364296 ARM1136
 + + ++           r0p2 erratum (possible cache data corruption with
 + + ++           hit-under-miss enabled). It sets the undocumented bit 31 in
 + + ++           the auxiliary control register and the FI bit in the control
 + + ++           register, thus disabling hit-under-miss without putting the
 + + ++           processor into full low interrupt latency mode. ARM11MPCore
 + + ++           is not affected.
 + + ++ 
 +++++++config ARM_ERRATA_764369
 +++++++        bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
 +++++++        depends on CPU_V7 && SMP
 +++++++        help
 +++++++          This option enables the workaround for erratum 764369
 +++++++          affecting Cortex-A9 MPCore with two or more processors (all
 +++++++          current revisions). Under certain timing circumstances, a data
 +++++++          cache line maintenance operation by MVA targeting an Inner
 +++++++          Shareable memory region may fail to proceed up to either the
 +++++++          Point of Coherency or to the Point of Unification of the
 +++++++          system. This workaround adds a DSB instruction before the
 +++++++          relevant cache maintenance functions and sets a specific bit
 +++++++          in the diagnostic control register of the SCU.
 +++++++
        endmenu
        
        source "arch/arm/common/Kconfig"

diff --cc arch/arm/Kconfig.debug
index 81cbe40c159c63c20968d224f960d3d353509946,0c7a4f52d2b37a6f3e45fa2fab7bc8570bb63a04,b3dc1fa30848c17725227aee44eaefe17e2f5485,81cbe40c159c63c20968d224f960d3d353509946,81cbe40c159c63c20968d224f960d3d353509946,81cbe40c159c63c20968d224f960d3d353509946,81cbe40c159c63c20968d224f960d3d353509946,81cbe40c159c63c20968d224f960d3d353509946..df3eb3ccd7693564cf72098d107b29cc055c8d2a
--- 1/arch/arm/Kconfig.debug
--- 2/arch/arm/Kconfig.debug
--- 3/arch/arm/Kconfig.debug
--- 4/arch/arm/Kconfig.debug
--- 5/arch/arm/Kconfig.debug
--- 6/arch/arm/Kconfig.debug
--- 7/arch/arm/Kconfig.debug
--- 8/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@@@@@@@@ -80,21 -80,21 -138,9 -80,21 -80,21 -80,21 -80,21 -80,21 +138,9 @@@@@@@@@ config EARLY_PRINT
                  kernel low-level debugging functions. Add earlyprintk to your
                  kernel parameters to enable this console.
        
-- -----config DEBUG_ICEDCC
-- -----        bool "Kernel low-level debugging via EmbeddedICE DCC channel"
-- -----        depends on DEBUG_LL
-- -----        help
-- -----          Say Y here if you want the debug print routines to direct their
-- -----          output to the EmbeddedICE macrocell's DCC channel using
-- -----          co-processor 14. This is known to work on the ARM9 style ICE
-- -----          channel and on the XScale with the PEEDI.
-- -----
-- -----          It does include a timeout to ensure that the system does not
-- -----          totally freeze when there is nothing connected to read.
-- -----
        config OC_ETM
                bool "On-chip ETM and ETB"
- ------        select ARM_AMBA
+ ++++++        depends on ARM_AMBA
                help
                  Enables the on-chip embedded trace macrocell and embedded trace
                  buffer driver that will allow you to collect traces of the

diff --cc arch/arm/common/vic.c
Simple merge

diff --cc arch/arm/include/asm/io.h
Simple merge

diff --cc arch/arm/include/asm/localtimer.h
Simple merge

diff --cc arch/arm/kernel/Makefile
Simple merge

diff --cc arch/arm/kernel/head.S
Simple merge

diff --cc arch/arm/kernel/smp_scu.c
Simple merge

diff --cc arch/arm/mach-exynos4/platsmp.c
Simple merge

diff --cc arch/arm/mm/dma-mapping.c
Simple merge

diff --cc arch/arm/mm/proc-v7.S
Simple merge