NTB: Improve performance with write combining

Changing the memory window BAR mappings to write combining significantly
boosts the performance.  We will also use memcpy that uses non-temporal
store, which showed performance improvement when doing non-cached
memcpys.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>

diff --git a/drivers/ntb/ntb_transport.c b/drivers/ntb/ntb_transport.c
index dc14ec81c43e64b4d81fac793f5b81438afcc6fa..7a765d3230d86f5e45442c0e851721a5a7dfa406 100644 (file)
--- a/drivers/ntb/ntb_transport.c
+++ b/drivers/ntb/ntb_transport.c
@@ -58,6 +58,7 @@
 #include <linux/pci.h>
 #include <linux/slab.h>
 #include <linux/types.h>
+#include <linux/uaccess.h>
 #include "linux/ntb.h"
 #include "linux/ntb_transport.h"
 
@@ -993,7 +994,7 @@ static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev)
                if (rc)
                        goto err1;
 
-               mw->vbase = ioremap(mw->phys_addr, mw->phys_size);
+               mw->vbase = ioremap_wc(mw->phys_addr, mw->phys_size);
                if (!mw->vbase) {
                        rc = -ENOMEM;
                        goto err1;
@@ -1375,7 +1376,15 @@ static void ntb_tx_copy_callback(void *data)
 
 static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset)
 {
+#ifdef ARCH_HAS_NOCACHE_UACCESS
+       /*
+        * Using non-temporal mov to improve performance on non-cached
+        * writes, even though we aren't actually copying from user space.
+        */
+       __copy_from_user_inatomic_nocache(offset, entry->buf, entry->len);
+#else
        memcpy_toio(offset, entry->buf, entry->len);
+#endif
 
        /* Ensure that the data is fully copied out before setting the flags */
        wmb();