Add the gate clocks and register region address definition
for FIMC-LITE devices available in EXYNOS4X12 SoCs.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
                .devname        = SYSMMU_CLOCK_DEVNAME(isp, 9),
                .enable         = exynos4212_clk_ip_isp1_ctrl,
                .ctrlbit        = (1 << 4),
+       }, {
+               .name           = "flite",
+               .devname        = "exynos-fimc-lite.0",
+               .enable         = exynos4212_clk_ip_isp0_ctrl,
+               .ctrlbit        = (1 << 4),
+       }, {
+               .name           = "flite",
+               .devname        = "exynos-fimc-lite.1",
+               .enable         = exynos4212_clk_ip_isp0_ctrl,
+               .ctrlbit        = (1 << 3),
        }
 };
 
 
 
 #define EXYNOS4_PA_JPEG                        0x11840000
 
+/* x = 0...1 */
+#define EXYNOS4_PA_FIMC_LITE(x)                (0x12390000 + ((x) * 0x10000))
+
 #define EXYNOS4_PA_G2D                 0x12800000
 
 #define EXYNOS4_PA_I2S0                        0x03830000