PCI/ASPM: Rename L1.2-specific functions from 'l1ss' to 'l12'

The functions aspm_calc_l1ss_info() and calc_l1ss_pwron() perform
calculations and register programming specific to L1.2 state.  Rename them
to aspm_calc_l12_info() and calc_l12_pwron() respectively.

Link: https://lore.kernel.org/r/20230504111301.229358-5-ajayagarwal@google.com
Signed-off-by: Ajay Agarwal <ajayagarwal@google.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 338eedef12f1f4ae4f2c66af6d97441c7efa7d44..d3d8dfe1fb7312e8923c60a3ebc133395638c3d7 100644 (file)
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -337,7 +337,7 @@ static u32 calc_l1_acceptable(u32 encoding)
 }
 
 /* Convert L1SS T_pwr encoding to usec */
-static u32 calc_l1ss_pwron(struct pci_dev *pdev, u32 scale, u32 val)
+static u32 calc_l12_pwron(struct pci_dev *pdev, u32 scale, u32 val)
 {
        switch (scale) {
        case 0:
@@ -471,7 +471,7 @@ static void pci_clear_and_set_dword(struct pci_dev *pdev, int pos,
 }
 
 /* Calculate L1.2 PM substate timing parameters */
-static void aspm_calc_l1ss_info(struct pcie_link_state *link,
+static void aspm_calc_l12_info(struct pcie_link_state *link,
                                u32 parent_l1ss_cap, u32 child_l1ss_cap)
 {
        struct pci_dev *child = link->downstream, *parent = link->pdev;
@@ -495,13 +495,13 @@ static void aspm_calc_l1ss_info(struct pcie_link_state *link,
        val2   = (child_l1ss_cap & PCI_L1SS_CAP_P_PWR_ON_VALUE) >> 19;
        scale2 = (child_l1ss_cap & PCI_L1SS_CAP_P_PWR_ON_SCALE) >> 16;
 
-       if (calc_l1ss_pwron(parent, scale1, val1) >
-           calc_l1ss_pwron(child, scale2, val2)) {
+       if (calc_l12_pwron(parent, scale1, val1) >
+           calc_l12_pwron(child, scale2, val2)) {
                ctl2 |= scale1 | (val1 << 3);
-               t_power_on = calc_l1ss_pwron(parent, scale1, val1);
+               t_power_on = calc_l12_pwron(parent, scale1, val1);
        } else {
                ctl2 |= scale2 | (val2 << 3);
-               t_power_on = calc_l1ss_pwron(child, scale2, val2);
+               t_power_on = calc_l12_pwron(child, scale2, val2);
        }
 
        /*
@@ -617,7 +617,7 @@ static void aspm_l1ss_init(struct pcie_link_state *link)
                link->aspm_enabled |= ASPM_STATE_L1_2_PCIPM;
 
        if (link->aspm_support & ASPM_STATE_L1SS)
-               aspm_calc_l1ss_info(link, parent_l1ss_cap, child_l1ss_cap);
+               aspm_calc_l12_info(link, parent_l1ss_cap, child_l1ss_cap);
 }
 
 static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)