arm64: dts: qcom: ipq9574: Update xo_board_clk to use fixed factor clock

xo_board_clk is fixed to 24 MHZ, which is routed from WiFi output clock
48 MHZ (also being the reference clock of CMN PLL) divided 2 by analog
block routing channel.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://lore.kernel.org/r/20250103-qcom_ipq_cmnpll-v8-5-c89fb4d4849d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
index bb1ff79360d3483ac779642880b18339acdde167..ae12f069f26fa53ae15657d5fa2ee297e68c3ec8 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
@@ -175,8 +175,13 @@
        clock-mult = <1>;
 };
 
+/*
+ * The frequency of xo_board_clk is fixed to 24 MHZ, which is routed
+ * from WiFi output clock 48 MHZ divided by 2.
+ */
 &xo_board_clk {
-       clock-frequency = <24000000>;
+       clock-div = <2>;
+       clock-mult = <1>;
 };
 
 &xo_clk {

diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index c543c3492e931ffd2ff1424881db7d8c035159d8..3e93484e7e32bcbb6edb2896299c38e6130b033e 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -32,7 +32,8 @@
                };
 
                xo_board_clk: xo-board-clk {
-                       compatible = "fixed-clock";
+                       compatible = "fixed-factor-clock";
+                       clocks = <&ref_48mhz_clk>;
                        #clock-cells = <0>;
                };