static inline void __iomem *s3c_irq_uart_base(struct irq_data *data)
 {
-       struct s3c_uart_irq *uirq = data->chip_data;
+       struct s3c_uart_irq *uirq = irq_data_get_irq_chip_data(data);
        return uirq->regs;
 }
 
 
 static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
 {
-       struct s3c_uart_irq *uirq = desc->handler_data;
+       struct s3c_uart_irq *uirq = desc->irq_data.handler_data;
        u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
        int base = uirq->base_irq;
 
                set_irq_flags(irq, IRQF_VALID);
        }
 
-       desc->handler_data = uirq;
+       desc->irq_data.handler_data = uirq;
        set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
 }
 
 
 
 static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
 {
-       generic_handle_irq((int)desc->handler_data);
+       generic_handle_irq((int)desc->irq_data.handler_data);
 }
 
 /* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
        set_irq_handler(timer_irq, handle_level_irq);
        set_irq_flags(timer_irq, IRQF_VALID);
 
-       desc->handler_data = (void *)timer_irq;
+       desc->irq_data.handler_data = (void *)timer_irq;
 }