Merge tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro...

Pull iommu updates from Joerg Roedel:
 "Core changes:

   - Consolidate probe_device path

   - Make the PCI-SAC IOVA allocation trick PCI-only

  AMD IOMMU:

   - Consolidate PPR log handling

   - Interrupt handling improvements

   - Refcount fixes for amd_iommu_v2 driver

  Intel VT-d driver:

   - Enable idxd device DMA with pasid through iommu dma ops

   - Lift RESV_DIRECT check from VT-d driver to core

   - Miscellaneous cleanups and fixes

  ARM-SMMU drivers:

   - Device-tree binding updates:
      - Add additional compatible strings for Qualcomm SoCs
      - Allow ASIDs to be configured in the DT to work around Qualcomm's
        broken hypervisor
      - Fix clocks for Qualcomm's MSM8998 SoC

   - SMMUv2:
      - Support for Qualcomm's legacy firmware implementation featured
        on at least MSM8956 and MSM8976
      - Match compatible strings for Qualcomm SM6350 and SM6375 SoC
        variants

   - SMMUv3:
      - Use 'ida' instead of a bitmap for VMID allocation

   - Rockchip IOMMU:
      - Lift page-table allocation restrictions on newer hardware

   - Mediatek IOMMU:
      - Add MT8188 IOMMU Support

   - Renesas IOMMU:
      - Allow PCIe devices

  .. and the usual set of cleanups an smaller fixes"

* tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (64 commits)
  iommu: Explicitly include correct DT includes
  iommu/amd: Remove unused declarations
  iommu/arm-smmu-qcom: Add SM6375 SMMUv2
  iommu/arm-smmu-qcom: Add SM6350 DPU compatible
  iommu/arm-smmu-qcom: Add SM6375 DPU compatible
  iommu/arm-smmu-qcom: Sort the compatible list alphabetically
  dt-bindings: arm-smmu: Fix MSM8998 clocks description
  iommu/vt-d: Remove unused extern declaration dmar_parse_dev_scope()
  iommu/vt-d: Fix to convert mm pfn to dma pfn
  iommu/vt-d: Fix to flush cache of PASID directory table
  iommu/vt-d: Remove rmrr check in domain attaching device path
  iommu: Prevent RESV_DIRECT devices from blocking domains
  dmaengine/idxd: Re-enable kernel workqueue under DMA API
  iommu/vt-d: Add set_dev_pasid callback for dma domain
  iommu/vt-d: Prepare for set_dev_pasid callback
  iommu/vt-d: Make prq draining code generic
  iommu/vt-d: Remove pasid_mutex
  iommu/vt-d: Add domain_flush_pasid_iotlb()
  iommu: Move global PASID allocation from SVA to core
  iommu: Generalize PASID 0 for normal DMA w/o PASID
  ...

diff --cc MAINTAINERS
Simple merge

diff --cc drivers/acpi/scan.c
Simple merge

diff --cc drivers/iommu/amd/iommu.c
Simple merge

diff --cc drivers/iommu/amd/iommu_v2.c
Simple merge

diff --cc drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
Simple merge

diff --cc drivers/iommu/intel/iommu.c
index 9e6f78830ececa186949f0376dcfac3e64730d5b,dd8ff358867d093e58aac27b5a391613b36fa4d2..5db283c17e0dc5cd7ffd0147efec316595df53c8
--- 1/drivers/iommu/intel/iommu.c
--- 2/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@@ -4729,30 -4721,72 +4722,90 @@@ static void intel_iommu_remove_dev_pasi
                        break;
                }
        }
+       WARN_ON_ONCE(!dev_pasid);
+       spin_unlock_irqrestore(&dmar_domain->lock, flags);
  
+       domain_detach_iommu(dmar_domain, iommu);
+       kfree(dev_pasid);
+ out_tear_down:
        intel_pasid_tear_down_entry(iommu, dev, pasid, false);
+       intel_drain_pasid_prq(dev, pasid);
+ }
+ 
+ static int intel_iommu_set_dev_pasid(struct iommu_domain *domain,
+                                    struct device *dev, ioasid_t pasid)
+ {
+       struct device_domain_info *info = dev_iommu_priv_get(dev);
+       struct dmar_domain *dmar_domain = to_dmar_domain(domain);
+       struct intel_iommu *iommu = info->iommu;
+       struct dev_pasid_info *dev_pasid;
+       unsigned long flags;
+       int ret;
+ 
+       if (!pasid_supported(iommu) || dev_is_real_dma_subdevice(dev))
+               return -EOPNOTSUPP;
+ 
+       if (context_copied(iommu, info->bus, info->devfn))
+               return -EBUSY;
+ 
+       ret = prepare_domain_attach_device(domain, dev);
+       if (ret)
+               return ret;
+ 
+       dev_pasid = kzalloc(sizeof(*dev_pasid), GFP_KERNEL);
+       if (!dev_pasid)
+               return -ENOMEM;
+ 
+       ret = domain_attach_iommu(dmar_domain, iommu);
+       if (ret)
+               goto out_free;
+ 
+       if (domain_type_is_si(dmar_domain))
+               ret = intel_pasid_setup_pass_through(iommu, dmar_domain,
+                                                    dev, pasid);
+       else if (dmar_domain->use_first_level)
+               ret = domain_setup_first_level(iommu, dmar_domain,
+                                              dev, pasid);
+       else
+               ret = intel_pasid_setup_second_level(iommu, dmar_domain,
+                                                    dev, pasid);
+       if (ret)
+               goto out_detach_iommu;
+ 
+       dev_pasid->dev = dev;
+       dev_pasid->pasid = pasid;
+       spin_lock_irqsave(&dmar_domain->lock, flags);
+       list_add(&dev_pasid->link_domain, &dmar_domain->dev_pasids);
+       spin_unlock_irqrestore(&dmar_domain->lock, flags);
+ 
+       return 0;
+ out_detach_iommu:
+       domain_detach_iommu(dmar_domain, iommu);
+ out_free:
+       kfree(dev_pasid);
+       return ret;
  }
  
 +static void *intel_iommu_hw_info(struct device *dev, u32 *length, u32 *type)
 +{
 +      struct device_domain_info *info = dev_iommu_priv_get(dev);
 +      struct intel_iommu *iommu = info->iommu;
 +      struct iommu_hw_info_vtd *vtd;
 +
 +      vtd = kzalloc(sizeof(*vtd), GFP_KERNEL);
 +      if (!vtd)
 +              return ERR_PTR(-ENOMEM);
 +
 +      vtd->cap_reg = iommu->cap;
 +      vtd->ecap_reg = iommu->ecap;
 +      *length = sizeof(*vtd);
 +      *type = IOMMU_HW_INFO_TYPE_INTEL_VTD;
 +      return vtd;
 +}
 +
  const struct iommu_ops intel_iommu_ops = {
        .capable                = intel_iommu_capable,
 +      .hw_info                = intel_iommu_hw_info,
        .domain_alloc           = intel_iommu_domain_alloc,
        .probe_device           = intel_iommu_probe_device,
        .probe_finalize         = intel_iommu_probe_finalize,

diff --cc drivers/iommu/intel/svm.c
index 8f6d68006ab6a9dae13b2d63b1b2ca8602de4f60,9fbae9af66159e36e6983ab3b8182713f92819aa..50a481c895b867202a4317afb7ef19a5666eafe5
--- 1/drivers/iommu/intel/svm.c
--- 2/drivers/iommu/intel/svm.c
+++ b/drivers/iommu/intel/svm.c
@@@ -256,11 -254,9 +254,9 @@@ static void intel_mm_release(struct mmu
  
  static const struct mmu_notifier_ops intel_mmuops = {
        .release = intel_mm_release,
 -      .invalidate_range = intel_invalidate_range,
 +      .arch_invalidate_secondary_tlbs = intel_arch_invalidate_secondary_tlbs,
  };
  
- static DEFINE_MUTEX(pasid_mutex);
- 
  static int pasid_to_svm_sdev(struct device *dev, unsigned int pasid,
                             struct intel_svm **rsvm,
                             struct intel_svm_dev **rsdev)

diff --cc drivers/iommu/iommu.c
Simple merge

diff --cc include/linux/iommu.h
Simple merge