kABI: Revert kABI: Make the boot_cpu_data look normal

.. which was the wrong way about it. The 'struct task_struct'
embeds boot_cpu_data in it, and the increase from 13 to 14
meant that any offset's in the 'struct task_struct' are now
off. Which is definitly an kABI breakage!

This fix puts the structure back to the original size,
and moves the 'ipbp' in the 'Linux custom' word and all is good.

Orabug: 27344012
CVE: CVE-2017-5715

Reported-by: Todd Vierling <todd.vierling@oracle.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Brian Maly <brian.maly@oracle.com>
Reviewed-by: John Haxby <john.haxby@oracle.com>
Signed-off-by: Kirtikar Kashyap <kirtikar.kashyap@oracle.com>

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index edf4c963f26ec61f59b82b50b0cb0a33e4fb4b61..4dc2c67193cdff5fb0e6a624f6d973a67b5cbec8 100644 (file)
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -12,12 +12,7 @@
 #include <asm/disabled-features.h>
 #endif
 
-#ifdef __GENKSYMS__
-/* Make it look like we didn't change it. */
 #define NCAPINTS       13      /* N 32-bit words worth of info */
-#else
-#define NCAPINTS       14      /* N 32-bit words worth of info */
-#endif
 #define NBUGINTS       1       /* N 32-bit bug flags */
 
 /*
@@ -206,6 +201,11 @@
 #define X86_FEATURE_IA32_ARCH_CAPS     ( 7*32+21) /* Control Speculation Control */
 #define X86_FEATURE_IBRS_ATT   ( 7*32+22) /* IBRS all the time */
 
+/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13.
+ * But thanks to kABI we have to jam it somewhere else. */
+#define X86_FEATURE_IBPB                (7*32+23) /* Indirect Branch Prediction Barrier */
+
+
 /* Virtualization flags: Linux defined, word 8 */
 #define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
 #define X86_FEATURE_VNMI        ( 8*32+ 1) /* Intel Virtual NMI */
@@ -261,9 +261,6 @@
 /* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:1 (edx), word 12 */
 #define X86_FEATURE_CQM_OCCUP_LLC (12*32+ 0) /* LLC occupancy monitoring if 1 */
 
-/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
-#define X86_FEATURE_IBPB                (13*32+12) /* Indirect Branch Prediction Barrier */
-
 /*
  * BUG word(s)
  */

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index f71484053a9164bb48992eebf4f47879df22d447..145bddb56dd853cbc20a455aada19d90ac2d8197 100644 (file)
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -688,8 +688,8 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
                c->x86_virt_bits = (eax >> 8) & 0xff;
                c->x86_phys_bits = eax & 0xff;
                /* Only look for X86_FEATURE_IBPB. */
-               ebx &= (1u<<12);
-               c->x86_capability[X86_FEATURE_IBPB / 32] = ebx;
+               if (ebx & BIT(12))
+                       set_cpu_cap(c, X86_FEATURE_IBPB);
        }
 #ifdef CONFIG_X86_32
        else if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36))