ARM: dts: r9a06g032: Add the watchdog nodes

This SoC includes 2 watchdog controllers (one per A7 core).

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Link: https://lore.kernel.org/r/20220221095032.95054-4-jjhiblot@traphandler.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi
index db657224688acde87c536849b7e81caeb3e6bf86..636a6ab31c589c3efeda75cba4b6d5df5770bd6a 100644 (file)
--- a/arch/arm/boot/dts/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/r9a06g032.dtsi
@@ -66,6 +66,22 @@
                interrupt-parent = <&gic>;
                ranges;
 
+               wdt0: watchdog@40008000 {
+                       compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
+                       reg = <0x40008000 0x1000>;
+                       interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
+                       status = "disabled";
+               };
+
+               wdt1: watchdog@40009000 {
+                       compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
+                       reg = <0x40009000 0x1000>;
+                       interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
+                       status = "disabled";
+               };
+
                sysctrl: system-controller@4000c000 {
                        compatible = "renesas,r9a06g032-sysctrl";
                        reg = <0x4000c000 0x1000>;