mmc: sdhci-of-esdhc: set the sd clock divisor value above 3

This patch is to set the sd clock divisor value above 3 in tuning mode

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 68c5866f5c853b64f72f57e5e9ed7cfeca468378..c56c7d413a0935123efa88eec4890e8e2b3241ef 100644 (file)
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -830,9 +830,17 @@ static int esdhc_execute_tuning(struct mmc_host *mmc, u32 opcode)
        struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
        struct sdhci_esdhc *esdhc = sdhci_pltfm_priv(pltfm_host);
        bool hs400_tuning;
+       unsigned int clk;
        u32 val;
        int ret;
 
+       /* For tuning mode, the sd clock divisor value
+        * must be larger than 3 according to reference manual.
+        */
+       clk = esdhc->peripheral_clock / 3;
+       if (host->clock > clk)
+               esdhc_of_set_clock(host, clk);
+
        if (esdhc->quirk_limited_clk_division &&
            host->flags & SDHCI_HS400_TUNING)
                esdhc_of_set_clock(host, host->clock);