/* FWSM register */
        mac->has_fwsm = true;
        /* ARC supported; valid only if manageability features are enabled. */
-       mac->arc_subsystem_valid =
-               (er32(FWSM) & E1000_FWSM_MODE_MASK)
-                       ? true : false;
+       mac->arc_subsystem_valid = !!(er32(FWSM) & E1000_FWSM_MODE_MASK);
        /* Adaptive IFS not supported */
        mac->adaptive_ifs = false;
 
 
                 * ARC supported; valid only if manageability features are
                 * enabled.
                 */
-               mac->arc_subsystem_valid =
-                       (er32(FWSM) & E1000_FWSM_MODE_MASK)
-                       ? true : false;
+               mac->arc_subsystem_valid = !!(er32(FWSM) &
+                                             E1000_FWSM_MODE_MASK);
                break;
        case e1000_82574:
        case e1000_82583:
        /* Check for pending operations. */
        for (i = 0; i < E1000_FLASH_UPDATES; i++) {
                usleep_range(1000, 2000);
-               if ((er32(EECD) & E1000_EECD_FLUPD) == 0)
+               if (!(er32(EECD) & E1000_EECD_FLUPD))
                        break;
        }
 
 
        for (i = 0; i < E1000_FLASH_UPDATES; i++) {
                usleep_range(1000, 2000);
-               if ((er32(EECD) & E1000_EECD_FLUPD) == 0)
+               if (!(er32(EECD) & E1000_EECD_FLUPD))
                        break;
        }
 
 
        hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
 
        /* Check if the flash descriptor is valid */
-       if (hsfsts.hsf_status.fldesvalid == 0) {
+       if (!hsfsts.hsf_status.fldesvalid) {
                e_dbg("Flash descriptor invalid.  SW Sequencing must be used.\n");
                return -E1000_ERR_NVM;
        }
         * completed.
         */
 
-       if (hsfsts.hsf_status.flcinprog == 0) {
+       if (!hsfsts.hsf_status.flcinprog) {
                /*
                 * There is no cycle running at present,
                 * so we can start a cycle.
                 */
                for (i = 0; i < ICH_FLASH_READ_COMMAND_TIMEOUT; i++) {
                        hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
-                       if (hsfsts.hsf_status.flcinprog == 0) {
+                       if (!hsfsts.hsf_status.flcinprog) {
                                ret_val = 0;
                                break;
                        }
        /* wait till FDONE bit is set to 1 */
        do {
                hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
-               if (hsfsts.hsf_status.flcdone == 1)
+               if (hsfsts.hsf_status.flcdone)
                        break;
                udelay(1);
        } while (i++ < timeout);
 
-       if (hsfsts.hsf_status.flcdone == 1 && hsfsts.hsf_status.flcerr == 0)
+       if (hsfsts.hsf_status.flcdone && !hsfsts.hsf_status.flcerr)
                return 0;
 
        return -E1000_ERR_NVM;
                         * ICH_FLASH_CYCLE_REPEAT_COUNT times.
                         */
                        hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
-                       if (hsfsts.hsf_status.flcerr == 1) {
+                       if (hsfsts.hsf_status.flcerr) {
                                /* Repeat for some time before giving up. */
                                continue;
-                       } else if (hsfsts.hsf_status.flcdone == 0) {
+                       } else if (!hsfsts.hsf_status.flcdone) {
                                e_dbg("Timeout error - flash cycle did not complete.\n");
                                break;
                        }
        if (ret_val)
                return ret_val;
 
-       if ((data & 0x40) == 0) {
+       if (!(data & 0x40)) {
                data |= 0x40;
                ret_val = e1000_write_nvm(hw, 0x19, 1, &data);
                if (ret_val)
                 * try...ICH_FLASH_CYCLE_REPEAT_COUNT times.
                 */
                hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
-               if (hsfsts.hsf_status.flcerr == 1)
+               if (hsfsts.hsf_status.flcerr)
                        /* Repeat for some time before giving up. */
                        continue;
-               if (hsfsts.hsf_status.flcdone == 0) {
+               if (!hsfsts.hsf_status.flcdone) {
                        e_dbg("Timeout error - flash cycle did not complete.\n");
                        break;
                }
                         * a few more times else Done
                         */
                        hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
-                       if (hsfsts.hsf_status.flcerr == 1)
+                       if (hsfsts.hsf_status.flcerr)
                                /* repeat for some time before giving up */
                                continue;
-                       else if (hsfsts.hsf_status.flcdone == 0)
+                       else if (!hsfsts.hsf_status.flcdone)
                                return ret_val;
                } while (++count < ICH_FLASH_CYCLE_REPEAT_COUNT);
        }
 
        /* If EEPROM is not marked present, init the IGP 3 PHY manually */
        if (hw->mac.type <= e1000_ich9lan) {
-               if (((er32(EECD) & E1000_EECD_PRES) == 0) &&
+               if (!(er32(EECD) & E1000_EECD_PRES) &&
                    (hw->phy.type == e1000_phy_igp_3)) {
                        e1000e_phy_init_script_igp3(hw);
                }
 
                return ret_val;
        }
 
-       if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0)
+       if (!(nvm_data & NVM_WORD0F_PAUSE_MASK))
                hw->fc.requested_mode = e1000_fc_none;
        else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == NVM_WORD0F_ASM_DIR)
                hw->fc.requested_mode = e1000_fc_tx_pause;
 
 
        /* Check that the host interface is enabled. */
        hicr = er32(HICR);
-       if ((hicr & E1000_HICR_EN) == 0) {
+       if (!(hicr & E1000_HICR_EN)) {
                e_dbg("E1000_HOST_EN bit disabled.\n");
                return -E1000_ERR_HOST_INTERFACE_COMMAND;
        }
 
         *   1 - Enabled
         */
        phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL;
-       if (phy->disable_polarity_correction == 1)
+       if (phy->disable_polarity_correction)
                phy_data |= M88E1000_PSCR_POLARITY_REVERSAL;
 
        /* Enable downshift on BM (disabled by default) */
         * If autoneg_advertised is zero, we assume it was not defaulted
         * by the calling code so we set to advertise full capability.
         */
-       if (phy->autoneg_advertised == 0)
+       if (!phy->autoneg_advertised)
                phy->autoneg_advertised = phy->autoneg_mask;
 
        e_dbg("Reconfiguring auto-neg advertisement params\n");
        ret_val = e1e_rphy(hw, offset, &phy_data);
 
        if (!ret_val)
-               phy->speed_downgraded = (phy_data & mask);
+               phy->speed_downgraded = !!(phy_data & mask);
 
        return ret_val;
 }
        if (ret_val)
                return ret_val;
 
-       phy->polarity_correction = (phy_data &
-                                   M88E1000_PSCR_POLARITY_REVERSAL);
+       phy->polarity_correction = !!(phy_data &
+                                     M88E1000_PSCR_POLARITY_REVERSAL);
 
        ret_val = e1000_check_polarity_m88(hw);
        if (ret_val)
        if (ret_val)
                return ret_val;
 
-       phy->is_mdix = (phy_data & M88E1000_PSSR_MDIX);
+       phy->is_mdix = !!(phy_data & M88E1000_PSSR_MDIX);
 
        if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) {
                ret_val = e1000_get_cable_length(hw);
        if (ret_val)
                return ret_val;
 
-       phy->is_mdix = (data & IGP01E1000_PSSR_MDIX);
+       phy->is_mdix = !!(data & IGP01E1000_PSSR_MDIX);
 
        if ((data & IGP01E1000_PSSR_SPEED_MASK) ==
            IGP01E1000_PSSR_SPEED_1000MBPS) {
        ret_val = e1e_rphy(hw, IFE_PHY_SPECIAL_CONTROL, &data);
        if (ret_val)
                return ret_val;
-       phy->polarity_correction = (data & IFE_PSC_AUTO_POLARITY_DISABLE)
-                                  ? false : true;
+       phy->polarity_correction = !(data & IFE_PSC_AUTO_POLARITY_DISABLE);
 
        if (phy->polarity_correction) {
                ret_val = e1000_check_polarity_ife(hw);
        if (ret_val)
                return ret_val;
 
-       phy->is_mdix = (data & IFE_PMC_MDIX_STATUS) ? true : false;
+       phy->is_mdix = !!(data & IFE_PMC_MDIX_STATUS);
 
        /* The following parameters are undefined for 10/100 operation. */
        phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
                if ((hw->phy.type == e1000_phy_82578) &&
                    (hw->phy.revision >= 1) &&
                    (hw->phy.addr == 2) &&
-                   ((MAX_PHY_REG_ADDRESS & reg) == 0) && (data & (1 << 11))) {
+                   !(MAX_PHY_REG_ADDRESS & reg) && (data & (1 << 11))) {
                        u16 data2 = 0x7EFF;
                        ret_val = e1000_access_phy_debug_regs_hv(hw,
                                                                 (1 << 6) | 0x3,
        if (ret_val)
                return ret_val;
 
-       phy->is_mdix = (data & I82577_PHY_STATUS2_MDIX) ? true : false;
+       phy->is_mdix = !!(data & I82577_PHY_STATUS2_MDIX);
 
        if ((data & I82577_PHY_STATUS2_SPEED_MASK) ==
            I82577_PHY_STATUS2_SPEED_1000MBPS) {