fbc->compressed_fb.size * fbc->threshold;
 }
 
+static u16 intel_fbc_gen9_wa_cfb_stride(struct drm_i915_private *dev_priv)
+{
+       struct intel_fbc *fbc = &dev_priv->fbc;
+       struct intel_fbc_state_cache *cache = &fbc->state_cache;
+
+       if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) &&
+           cache->fb.modifier != I915_FORMAT_MOD_X_TILED)
+               return DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8;
+       else
+               return 0;
+}
+
+static bool intel_fbc_gen9_wa_cfb_stride_changed(struct drm_i915_private *dev_priv)
+{
+       struct intel_fbc *fbc = &dev_priv->fbc;
+
+       return fbc->params.gen9_wa_cfb_stride != intel_fbc_gen9_wa_cfb_stride(dev_priv);
+}
+
 static bool intel_fbc_can_enable(struct drm_i915_private *dev_priv)
 {
        struct intel_fbc *fbc = &dev_priv->fbc;
        params->crtc.i9xx_plane = to_intel_plane(crtc->base.primary)->i9xx_plane;
 
        params->fb.format = cache->fb.format;
+       params->fb.modifier = cache->fb.modifier;
        params->fb.stride = cache->fb.stride;
 
        params->cfb_size = intel_fbc_calculate_cfb_size(dev_priv, cache);
        if (params->fb.format != cache->fb.format)
                return false;
 
+       if (params->fb.modifier != cache->fb.modifier)
+               return false;
+
        if (params->fb.stride != cache->fb.stride)
                return false;
 
 
        if (fbc->crtc) {
                if (fbc->crtc != crtc ||
-                   !intel_fbc_cfb_size_changed(dev_priv))
+                   (!intel_fbc_cfb_size_changed(dev_priv) &&
+                    !intel_fbc_gen9_wa_cfb_stride_changed(dev_priv)))
                        goto out;
 
                __intel_fbc_disable(dev_priv);
                goto out;
        }
 
-       if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) &&
-           plane_state->hw.fb->modifier != I915_FORMAT_MOD_X_TILED)
-               cache->gen9_wa_cfb_stride =
-                       DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8;
-       else
-               cache->gen9_wa_cfb_stride = 0;
+       cache->gen9_wa_cfb_stride = intel_fbc_gen9_wa_cfb_stride(dev_priv);
 
        drm_dbg_kms(&dev_priv->drm, "Enabling FBC on pipe %c\n",
                    pipe_name(crtc->pipe));