switch(type) {
        case CGS_GPU_MEM_TYPE__VISIBLE_CONTIG_FB:
        case CGS_GPU_MEM_TYPE__VISIBLE_FB:
-               flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
+               flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                       AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
                domain = AMDGPU_GEM_DOMAIN_VRAM;
                if (max_offset > adev->mc.real_vram_size)
                        return -EINVAL;
                break;
        case CGS_GPU_MEM_TYPE__INVISIBLE_CONTIG_FB:
        case CGS_GPU_MEM_TYPE__INVISIBLE_FB:
-               flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
+               flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS |
+                       AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
                domain = AMDGPU_GEM_DOMAIN_VRAM;
                if (adev->mc.visible_vram_size < adev->mc.real_vram_size) {
                        place.fpfn =
 
                r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
                if (unlikely(r))
                        return r;
+
+               if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)
+                       continue;
+
+               bo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
+               amdgpu_ttm_placement_from_domain(bo, bo->allowed_domains);
+               r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
+               if (unlikely(r))
+                       return r;
        }
 
        return 0;
 
        if (adev->vram_scratch.robj == NULL) {
                r = amdgpu_bo_create(adev, AMDGPU_GPU_PAGE_SIZE,
                                     PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM,
-                                    AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                                    AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                                    AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                                     NULL, NULL, &adev->vram_scratch.robj);
                if (r) {
                        return r;
 
        aligned_size = ALIGN(size, PAGE_SIZE);
        ret = amdgpu_gem_object_create(adev, aligned_size, 0,
                                       AMDGPU_GEM_DOMAIN_VRAM,
-                                      AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                                      AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                                      AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                                       true, &gobj);
        if (ret) {
                printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
 
        if (adev->gart.robj == NULL) {
                r = amdgpu_bo_create(adev, adev->gart.table_size,
                                     PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM,
-                                    AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                                    AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                                    AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                                     NULL, NULL, &adev->gart.robj);
                if (r) {
                        return r;
 
        int r;
 
        r = amdgpu_bo_create(adev, size, align, true, domain,
-                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                            AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                             NULL, NULL, bo_ptr);
        if (r) {
                dev_err(adev->dev, "(%d) failed to allocate kernel bo\n", r);
 
                return 0;
        }
+
+       bo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
        amdgpu_ttm_placement_from_domain(bo, domain);
        for (i = 0; i < bo->placement.num_placement; i++) {
                /* force to pin into visible video ram */
 
        size = bo->mem.num_pages << PAGE_SHIFT;
        offset = bo->mem.start << PAGE_SHIFT;
-       if ((offset + size) <= adev->mc.visible_vram_size)
+       /* TODO: figure out how to map scattered VRAM to the CPU */
+       if ((offset + size) <= adev->mc.visible_vram_size &&
+           (abo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS))
                return 0;
 
        /* Can't move a pinned BO to visible VRAM */
                return -EINVAL;
 
        /* hurrah the memory is not visible ! */
+       abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
        amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_VRAM);
        lpfn =  adev->mc.visible_vram_size >> PAGE_SHIFT;
        for (i = 0; i < abo->placement.num_placement; i++) {
        WARN_ON_ONCE(!ww_mutex_is_locked(&bo->tbo.resv->lock) &&
                     !bo->pin_count);
        WARN_ON_ONCE(bo->tbo.mem.start == AMDGPU_BO_INVALID_OFFSET);
+       WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_VRAM &&
+                    !(bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS));
 
        return bo->tbo.offset;
 }
 
 
        r = amdgpu_bo_create(adev, 256 * 1024, PAGE_SIZE, true,
                             AMDGPU_GEM_DOMAIN_VRAM,
-                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                            AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                             NULL, NULL, &adev->stollen_vga_memory);
        if (r) {
                return r;
 
 
        r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
                             AMDGPU_GEM_DOMAIN_VRAM,
-                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                            AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                             NULL, NULL, &bo);
        if (r)
                return r;
 
        r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
                             AMDGPU_GEM_DOMAIN_VRAM,
-                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                            AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                             NULL, NULL, &bo);
        if (r)
                return r;
 
 
        r = amdgpu_bo_create(adev, size, PAGE_SIZE, true,
                             AMDGPU_GEM_DOMAIN_VRAM,
-                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                            AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                             NULL, NULL, &adev->vce.vcpu_bo);
        if (r) {
                dev_err(adev->dev, "(%d) failed to allocate VCE bo\n", r);
 
                                     AMDGPU_GPU_PAGE_SIZE, true,
                                     AMDGPU_GEM_DOMAIN_VRAM,
                                     AMDGPU_GEM_CREATE_NO_CPU_ACCESS |
-                                    AMDGPU_GEM_CREATE_SHADOW,
+                                    AMDGPU_GEM_CREATE_SHADOW |
+                                    AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                                     NULL, resv, &pt);
                if (r)
                        goto error_free;
        r = amdgpu_bo_create(adev, pd_size, align, true,
                             AMDGPU_GEM_DOMAIN_VRAM,
                             AMDGPU_GEM_CREATE_NO_CPU_ACCESS |
-                            AMDGPU_GEM_CREATE_SHADOW,
+                            AMDGPU_GEM_CREATE_SHADOW |
+                            AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                             NULL, NULL, &vm->page_directory);
        if (r)
                goto error_free_sched_entity;
 
                if (adev->gfx.rlc.save_restore_obj == NULL) {
                        r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
                                             AMDGPU_GEM_DOMAIN_VRAM,
-                                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                                            AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                                             NULL, NULL,
                                             &adev->gfx.rlc.save_restore_obj);
                        if (r) {
                if (adev->gfx.rlc.clear_state_obj == NULL) {
                        r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
                                             AMDGPU_GEM_DOMAIN_VRAM,
-                                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                                            AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                                             NULL, NULL,
                                             &adev->gfx.rlc.clear_state_obj);
                        if (r) {
                if (adev->gfx.rlc.cp_table_obj == NULL) {
                        r = amdgpu_bo_create(adev, adev->gfx.rlc.cp_table_size, PAGE_SIZE, true,
                                             AMDGPU_GEM_DOMAIN_VRAM,
-                                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                                            AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                                             NULL, NULL,
                                             &adev->gfx.rlc.cp_table_obj);
                        if (r) {
 
                if (adev->gfx.rlc.clear_state_obj == NULL) {
                        r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
                                             AMDGPU_GEM_DOMAIN_VRAM,
-                                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                                            AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                                             NULL, NULL,
                                             &adev->gfx.rlc.clear_state_obj);
                        if (r) {
                if (adev->gfx.rlc.cp_table_obj == NULL) {
                        r = amdgpu_bo_create(adev, adev->gfx.rlc.cp_table_size, PAGE_SIZE, true,
                                             AMDGPU_GEM_DOMAIN_VRAM,
-                                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+                                            AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                                            AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
                                             NULL, NULL,
                                             &adev->gfx.rlc.cp_table_obj);
                        if (r) {
 
 #define AMDGPU_GEM_CREATE_VRAM_CLEARED         (1 << 3)
 /* Flag that create shadow bo(GTT) while allocating vram bo */
 #define AMDGPU_GEM_CREATE_SHADOW               (1 << 4)
+/* Flag that allocating the BO should use linear VRAM */
+#define AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS      (1 << 5)
 
 struct drm_amdgpu_gem_create_in  {
        /** the requested memory size */